xiemeng / Optek_sdk_131 · Commits

Commit fe7d31145c11c67e63decb81b965763ab866f7a0

Authored by ZhengJunNan
Committed by Gitee
2 parents 856470fc 4d704d23

!1 modify code by Luozs 

Merge pull request !1 from ZhengJunNan/master
Inline Side-by-side
Showing 19 changed files with 175 additions and 57 deletions
1 { 1 {
2 "files.associations": { 2 "files.associations": {
3 - "xutility": "c" 3 + "xutility": "c",
  4 + "app_main.h": "c"
4 } 5 }
5 } 6 }
@@ -220,7 +220,7 @@ lib/optek_lib_freeRTOS.a @@ -220,7 +220,7 @@ lib/optek_lib_freeRTOS.a
220 220
221 221
222 lib/optek_link_5ms.a 222 lib/optek_link_5ms.a
223 - 223 +/*lib/optek_link_5ms_for_swf.a*/
224 /* 224 /*
225 lib/optek_link_7p5ms.a 225 lib/optek_link_7p5ms.a
226 */ 226 */
No preview for this file type
@@ -109,7 +109,7 @@ int xa_pcm_downsample_dec_frame (U8 **pout,U16 *plen) @@ -109,7 +109,7 @@ int xa_pcm_downsample_dec_frame (U8 **pout,U16 *plen)
109 void *mem,*d2as_obj; 109 void *mem,*d2as_obj;
110 int frame_len; 110 int frame_len;
111 111
112 - if (optek_link_mode == TWS_SUBW_W_BT_SF44K || optek_link_mode == TWS_SUBW_W_BT_T6_SF44K || optek_link_mode == TWS_SUBW_W_BT_SF48K || optek_link_mode == TWS_SUBW_W_BT_T6_SF48K) 112 + if (0)//(optek_link_mode == TWS_SUBW_W_BT_SF44K || optek_link_mode == TWS_SUBW_W_BT_T6_SF44K || optek_link_mode == TWS_SUBW_W_BT_SF48K || optek_link_mode == TWS_SUBW_W_BT_T6_SF48K)
113 { 113 {
114 frame_len = 240; 114 frame_len = 240;
115 } 115 }
@@ -133,7 +133,7 @@ typedef struct{ @@ -133,7 +133,7 @@ typedef struct{
133 133
134 const APP_NAV_SOURCE source_table[] = 134 const APP_NAV_SOURCE source_table[] =
135 { 135 {
136 -// {MEDIA_BT_HCI,app_nav_rmt_convert_bt_hci}, 136 + //{MEDIA_BT_HCI,app_nav_rmt_convert_bt_hci},
137 {MEDIA_AUX,app_nav_rmt_convert_aux}, 137 {MEDIA_AUX,app_nav_rmt_convert_aux},
138 {MEDIA_OPTICAL,app_nav_rmt_convert_spdif}, 138 {MEDIA_OPTICAL,app_nav_rmt_convert_spdif},
139 139
@@ -694,7 +694,7 @@ void app_nav_rmt_convert_aux(void) @@ -694,7 +694,7 @@ void app_nav_rmt_convert_aux(void)
694 app_dac_receive_pcm_enable(FALSE); 694 app_dac_receive_pcm_enable(FALSE);
695 695
696 #if defined OPL_MODE_TWO_WAY || defined OPL_MODE_SINGLE_WAY 696 #if defined OPL_MODE_TWO_WAY || defined OPL_MODE_SINGLE_WAY
697 - #if 1 697 + #if 0
698 app_change_mode_req(GAME_HEADPHONE_PT_5MS_LP,100,50); 698 app_change_mode_req(GAME_HEADPHONE_PT_5MS_LP,100,50);
699 #else 699 #else
700 if (optek_link_mode == GAME_HEADPHONE_PT_5MS_LP || optek_link_mode == BC_SF48K_PT5MS) 700 if (optek_link_mode == GAME_HEADPHONE_PT_5MS_LP || optek_link_mode == BC_SF48K_PT5MS)
@@ -826,8 +826,11 @@ void app_nav_rmt_convert_aux(void) @@ -826,8 +826,11 @@ void app_nav_rmt_convert_aux(void)
826 app_main_data.ui_background = app_nav_ad_pcm_pocess; 826 app_main_data.ui_background = app_nav_ad_pcm_pocess;
827 827
828 uDecSend (DECODE_SET, DECODE_PCM); 828 uDecSend (DECODE_SET, DECODE_PCM);
829 - //uDecSend (DECODE_INIT, 0);  
830 - uDecSend (DECODE_FRAME, TRUE); //start to decode 829 + uDecSend (DECODE_INIT, 0);
  830 +
  831 + #ifndef OPTEK_LINK_ENABLE
  832 + uDecSend (DECODE_FRAME, FALSE); //start to decode
  833 + #endif
831 app_main_data.playing_stream_status = STREAM_MEDIA; 834 app_main_data.playing_stream_status = STREAM_MEDIA;
832 835
833 #if defined AUDIO_CODEC_USED_VOL 836 #if defined AUDIO_CODEC_USED_VOL
@@ -27,7 +27,7 @@ @@ -27,7 +27,7 @@
27 #include "app_sdram.h" 27 #include "app_sdram.h"
28 #include "Audio_Device.h" 28 #include "Audio_Device.h"
29 #include "bt_common.h" 29 #include "bt_common.h"
30 - 30 +#include "optek_link.h"
31 31
32 void app_nav_rmt_convert_bt_hci(void) 32 void app_nav_rmt_convert_bt_hci(void)
33 { 33 {
@@ -46,6 +46,18 @@ void app_nav_rmt_convert_bt_hci(void) @@ -46,6 +46,18 @@ void app_nav_rmt_convert_bt_hci(void)
46 46
47 DBG_Printf("covert to BT HCI\n"); 47 DBG_Printf("covert to BT HCI\n");
48 48
  49 +#ifdef OPL_MASTER_ENABLE
  50 + if(app_main_data.share_link_role != SL_ROLE_SLAVE)
  51 + {
  52 + void app_change_mode_req(u8 mode, u8 max_master_tx_len, u8 max_master_rx_len);
  53 + //app_change_mode_req(IDLE_W_BT,6,6);
  54 + app_change_mode_req(TWS_SUBW_W_BT_T6_SF44K,245,6);
  55 + //optek_link_role_stop();
  56 + delayms(100);
  57 + }
  58 +#endif
  59 +
  60 +
49 if(app_main_data.share_link_role != SL_ROLE_SLAVE) 61 if(app_main_data.share_link_role != SL_ROLE_SLAVE)
50 { 62 {
51 if (bt_status.bt_main_status == enBT_DISCONNECTED) 63 if (bt_status.bt_main_status == enBT_DISCONNECTED)
@@ -144,7 +144,7 @@ void app_dac_init (void) @@ -144,7 +144,7 @@ void app_dac_init (void)
144 #ifdef I2S1_DATA_OUT 144 #ifdef I2S1_DATA_OUT
145 DMA_Channel0_Init((U32 *)DA_I2S_OUT_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_IIS1_OUT); 145 DMA_Channel0_Init((U32 *)DA_I2S_OUT_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_IIS1_OUT);
146 if (app_main_data.share_link_role == SL_ROLE_SLAVE) 146 if (app_main_data.share_link_role == SL_ROLE_SLAVE)
147 - DMA_Channel8_Init((U32 *)DA_PP_CLASSD_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_DA_PP); 147 + DMA_Channel8_Init((U32 *)DA_SPDIF_OUT_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_SPDIF_DAC_OUT);
148 #else 148 #else
149 #ifdef AUDIO_PWM_OUTPUT 149 #ifdef AUDIO_PWM_OUTPUT
150 DMA_Channel0_Init((U32 *)DA_PP_CLASSD_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_DA_PP); 150 DMA_Channel0_Init((U32 *)DA_PP_CLASSD_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_DA_PP);
@@ -480,11 +480,13 @@ void Dma_0_TransmitIsr(void) @@ -480,11 +480,13 @@ void Dma_0_TransmitIsr(void)
480 } 480 }
481 } 481 }
482 482
  483 +static int dma8src[4] = {0,0,0,0};
483 void Dma_8_TransmitIsr (void) 484 void Dma_8_TransmitIsr (void)
484 { 485 {
485 U16 len; 486 U16 len;
486 int *pBuf,i; 487 int *pBuf,i;
487 488
  489 +
488 if (DMA_0_COUNT == 0) 490 if (DMA_0_COUNT == 0)
489 { 491 {
490 if (awOut_contrls.awSize) 492 if (awOut_contrls.awSize)
@@ -494,7 +496,7 @@ void Dma_8_TransmitIsr (void) @@ -494,7 +496,7 @@ void Dma_8_TransmitIsr (void)
494 DMA_0_SOURCE = (int *) &awOutStore.awOutSampleStore[awOut_contrls.awIndex][0]; //Source address 496 DMA_0_SOURCE = (int *) &awOutStore.awOutSampleStore[awOut_contrls.awIndex][0]; //Source address
495 DMA_0_COUNT = len; 497 DMA_0_COUNT = len;
496 498
497 - DMA_8_SOURCE = (int *) &awOutStore.awOutSampleStore[0][0]; 499 + DMA_8_SOURCE = dma8src;//(int *) &awOutStore.awOutSampleStore[0][0];
498 DMA_8_COUNT = len - TRANS_PART2_COUNT; 500 DMA_8_COUNT = len - TRANS_PART2_COUNT;
499 501
500 /*Clear the previous out data*/ 502 /*Clear the previous out data*/
@@ -515,7 +517,7 @@ void Dma_8_TransmitIsr (void) @@ -515,7 +517,7 @@ void Dma_8_TransmitIsr (void)
515 DMA_0_SOURCE = (int *) &awOutStore.awOutSampleStore[1-awOut_contrls.awIndex][0]; //Source address 517 DMA_0_SOURCE = (int *) &awOutStore.awOutSampleStore[1-awOut_contrls.awIndex][0]; //Source address
516 DMA_0_COUNT = Zero_Buf_Size*2; 518 DMA_0_COUNT = Zero_Buf_Size*2;
517 519
518 - DMA_8_SOURCE = (int *) &awOutStore.awOutSampleStore[0][0]; 520 + DMA_8_SOURCE = dma8src;//(int *) &awOutStore.awOutSampleStore[0][0];
519 DMA_8_COUNT = Zero_Buf_Size*2 - TRANS_PART2_COUNT; 521 DMA_8_COUNT = Zero_Buf_Size*2 - TRANS_PART2_COUNT;
520 } 522 }
521 } 523 }
@@ -523,7 +525,7 @@ void Dma_8_TransmitIsr (void) @@ -523,7 +525,7 @@ void Dma_8_TransmitIsr (void)
523 { 525 {
524 SOFT3_INT_SET; 526 SOFT3_INT_SET;
525 527
526 - DMA_8_SOURCE = (int *) &awOutStore.awOutSampleStore[0][0]; 528 + DMA_8_SOURCE = dma8src;//(int *) &awOutStore.awOutSampleStore[0][0];
527 DMA_8_COUNT = (TRANS_PART1_COUNT + TRANS_PART2_COUNT)*2; 529 DMA_8_COUNT = (TRANS_PART1_COUNT + TRANS_PART2_COUNT)*2;
528 } 530 }
529 } 531 }
@@ -1857,6 +1857,7 @@ detect_enter: @@ -1857,6 +1857,7 @@ detect_enter:
1857 1857
1858 1858
1859 Spdif_rcv_enable(); 1859 Spdif_rcv_enable();
  1860 + uDecSend (DECODE_INIT, 0);
1860 //spdif_dec_enable (); 1861 //spdif_dec_enable ();
1861 } 1862 }
1862 else 1863 else
@@ -142,11 +142,12 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen) @@ -142,11 +142,12 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
142 142
143 *pout = pDecOut; 143 *pout = pDecOut;
144 *plen = AD_PCM_BLOCK_SIZE; 144 *plen = AD_PCM_BLOCK_SIZE;
145 - DBG_Printf("dma0:%d\r\n",DMA_0_COUNT); 145 + //DBG_Printf("dma0:%d\r\n",DMA_0_COUNT);
146 return DECODE_SUCCESS; 146 return DECODE_SUCCESS;
147 } 147 }
148 148
149 /************sync with dma0************/ 149 /************sync with dma0************/
  150 +#if 0
150 if (inout_dma_sync_flag == FALSE) 151 if (inout_dma_sync_flag == FALSE)
151 { 152 {
152 U32 dma0_cnt = DMA_0_COUNT; 153 U32 dma0_cnt = DMA_0_COUNT;
@@ -155,7 +156,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen) @@ -155,7 +156,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
155 #ifdef OPL_MODE_TWO_WAY 156 #ifdef OPL_MODE_TWO_WAY
156 in_out_offset = 180; 157 in_out_offset = 180;
157 #else 158 #else
158 - in_out_offset = 32; 159 + in_out_offset = 64;
159 #endif 160 #endif
160 //i32 count = ((AD_PCM_BLOCK_SIZE/2-16) - dma0_cnt); 161 //i32 count = ((AD_PCM_BLOCK_SIZE/2-16) - dma0_cnt);
161 i32 count = ((AD_PCM_BLOCK_SIZE/2-in_out_offset) - dma0_cnt); 162 i32 count = ((AD_PCM_BLOCK_SIZE/2-in_out_offset) - dma0_cnt);
@@ -166,7 +167,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen) @@ -166,7 +167,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
166 { 167 {
167 //adj_outsamples = count>>1; 168 //adj_outsamples = count>>1;
168 memset(pDecOut,0,AD_PCM_BLOCK_SIZE*2); 169 memset(pDecOut,0,AD_PCM_BLOCK_SIZE*2);
169 - DBG_Printf("adj count1:%d\r\n",count); 170 + //DBG_Printf("adj count1:%d\r\n",count);
170 171
171 if (count > AD_PCM_BLOCK_SIZE/4) 172 if (count > AD_PCM_BLOCK_SIZE/4)
172 { 173 {
@@ -177,11 +178,13 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen) @@ -177,11 +178,13 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
177 count = (i32)(-in_out_offset); 178 count = (i32)(-in_out_offset);
178 } 179 }
179 180
180 - DBG_Printf("adj count:%d\r\n",count); 181 + //DBG_Printf("adj count:%d\r\n",count);
181 182
182 *pout = pDecOut; 183 *pout = pDecOut;
183 *plen = AD_PCM_BLOCK_SIZE + (count/8)*16; 184 *plen = AD_PCM_BLOCK_SIZE + (count/8)*16;
184 185
  186 + DBG_Printf("adj count:%d\r\n");
  187 +
185 return DECODE_SUCCESS; 188 return DECODE_SUCCESS;
186 } 189 }
187 else 190 else
@@ -189,6 +192,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen) @@ -189,6 +192,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
189 inout_dma_sync_flag = TRUE; 192 inout_dma_sync_flag = TRUE;
190 } 193 }
191 } 194 }
  195 +#endif
192 /************sync with dma0 end********/ 196 /************sync with dma0 end********/
193 197
194 if (p == NULL) 198 if (p == NULL)
@@ -709,7 +713,7 @@ void spdif_dec_init( void ) @@ -709,7 +713,7 @@ void spdif_dec_init( void )
709 da_pp_channel_setting(MI2S_OUTPUT_CHANNEL_DEFAULT); 713 da_pp_channel_setting(MI2S_OUTPUT_CHANNEL_DEFAULT);
710 #endif 714 #endif
711 715
712 - spdif_data_parser_init(); 716 + //spdif_data_parser_init();
713 717
714 codec_malloc_init (); 718 codec_malloc_init ();
715 719
@@ -1496,20 +1500,52 @@ void taskDec(void *pvParameters) @@ -1496,20 +1500,52 @@ void taskDec(void *pvParameters)
1496 } 1500 }
1497 1501
1498 #ifdef OPL_MODE_SINGLE_WAY 1502 #ifdef OPL_MODE_SINGLE_WAY
1499 - app_change_mode_req(BC_SF48K_PT5MS,100,6);  
1500 - #elif defined OPL_MODE_SWF 1503 + //app_change_mode_req(BC_SF48K_PT5MS,100,6);
  1504 +
1501 if (app_main_data.playing_stream_sample_rate == 48000) 1505 if (app_main_data.playing_stream_sample_rate == 48000)
1502 { 1506 {
1503 - app_change_mode_req(SUBW_SF48K_PT2P5MS,24,6); 1507 + app_change_mode_req(BC_SF48K_PT5MS,100,6);
1504 } 1508 }
1505 else if (app_main_data.playing_stream_sample_rate == 44100) 1509 else if (app_main_data.playing_stream_sample_rate == 44100)
1506 { 1510 {
1507 - app_change_mode_req(SUBW_SF44K_PT2P5MS,24,6); 1511 + app_change_mode_req(BC_SF44K_PT5MS,108,6);
1508 } 1512 }
1509 else 1513 else
1510 { 1514 {
1511 DBG_Printf("optek link not support sample rate\r\n"); 1515 DBG_Printf("optek link not support sample rate\r\n");
1512 } 1516 }
  1517 + #elif defined OPL_MODE_SWF
  1518 + if (decode_type == DECODE_SBC)
  1519 + {
  1520 + /*if (app_main_data.playing_stream_sample_rate == 48000)
  1521 + {
  1522 + app_change_mode_req(SUBW_SF48K_PT2P5MS,24,6);
  1523 + }
  1524 + else if (app_main_data.playing_stream_sample_rate == 44100)
  1525 + {
  1526 + app_change_mode_req(SUBW_SF44K_PT2P5MS,24,6);
  1527 + }
  1528 + else
  1529 + {
  1530 + DBG_Printf("optek link not support sample rate\r\n");
  1531 + }*/
  1532 + }
  1533 + else
  1534 + {
  1535 + if (app_main_data.playing_stream_sample_rate == 48000)
  1536 + {
  1537 + app_change_mode_req(SUBW_SF48K_PT2P5MS,24,6);
  1538 + }
  1539 + else if (app_main_data.playing_stream_sample_rate == 44100)
  1540 + {
  1541 + app_change_mode_req(SUBW_SF44K_PT2P5MS,24,6);
  1542 + }
  1543 + else
  1544 + {
  1545 + DBG_Printf("optek link not support sample rate\r\n");
  1546 + }
  1547 + }
  1548 +
1513 #endif 1549 #endif
1514 1550
1515 if (app_main_data.playing_stream_chans == 1) 1551 if (app_main_data.playing_stream_chans == 1)
@@ -1641,9 +1677,6 @@ void taskDec(void *pvParameters) @@ -1641,9 +1677,6 @@ void taskDec(void *pvParameters)
1641 else 1677 else
1642 csbm_put_tx_unencoded_data(pOut,len); 1678 csbm_put_tx_unencoded_data(pOut,len);
1643 1679
1644 - DBG_PIN_HIGH;  
1645 - DBG_PIN_LOW;  
1646 -  
1647 #if 0//(SHARE_LINK_MODE != SL_TWO_WAY_AV && SHARE_LINK_MODE != SL_TWO_WAY_VV) 1680 #if 0//(SHARE_LINK_MODE != SL_TWO_WAY_AV && SHARE_LINK_MODE != SL_TWO_WAY_VV)
1648 fifo_put_data(&audio_delay_fifo,pDacbuf,samples<<2); 1681 fifo_put_data(&audio_delay_fifo,pDacbuf,samples<<2);
1649 fifo_get_data(&audio_delay_fifo,pDacbuf,samples<<2); 1682 fifo_get_data(&audio_delay_fifo,pDacbuf,samples<<2);
@@ -1652,14 +1685,14 @@ void taskDec(void *pvParameters) @@ -1652,14 +1685,14 @@ void taskDec(void *pvParameters)
1652 //optek_hifi2_16b_to_24b(pDacbuf,pDacbuf,(samples<<1)); 1685 //optek_hifi2_16b_to_24b(pDacbuf,pDacbuf,(samples<<1));
1653 } 1686 }
1654 #endif 1687 #endif
1655 -/* 1688 +
1656 if (pOut_up != NULL) 1689 if (pOut_up != NULL)
1657 { 1690 {
1658 app_main_data.playing_stream_chans = 1; 1691 app_main_data.playing_stream_chans = 1;
1659 len >>= 1; 1692 len >>= 1;
1660 pOut = pOut_up; 1693 pOut = pOut_up;
1661 } 1694 }
1662 -*/ 1695 +
1663 while(len > max_out_len) 1696 while(len > max_out_len)
1664 { 1697 {
1665 slice <<= 1; 1698 slice <<= 1;
@@ -1691,6 +1724,8 @@ void taskDec(void *pvParameters) @@ -1691,6 +1724,8 @@ void taskDec(void *pvParameters)
1691 I32 adj; 1724 I32 adj;
1692 U32 hsamples = TRANS_PART1_SAMPLES/2; 1725 U32 hsamples = TRANS_PART1_SAMPLES/2;
1693 1726
  1727 + adj_outsamples -= last_adj;
  1728 +
1694 last_adj = 0; 1729 last_adj = 0;
1695 1730
1696 adj = adj_outsamples; 1731 adj = adj_outsamples;
@@ -1714,8 +1749,7 @@ void taskDec(void *pvParameters) @@ -1714,8 +1749,7 @@ void taskDec(void *pvParameters)
1714 last_adj = -adj; 1749 last_adj = -adj;
1715 } 1750 }
1716 1751
1717 - adj_outsamples -= last_adj;  
1718 - DBG_Printf("adj:%d,left:%d\r\n",last_adj,adj_outsamples); 1752 + DBG_Printf("adj:%d,left:%d\r\n",last_adj,adj_outsamples - last_adj);
1719 } 1753 }
1720 /*********sync end***************/ 1754 /*********sync end***************/
1721 1755
@@ -2,6 +2,8 @@ @@ -2,6 +2,8 @@
2 #define _AUDIO_DEC_H_ 2 #define _AUDIO_DEC_H_
3 3
4 #include "hw_codec.h" 4 #include "hw_codec.h"
  5 +#include "hw_da_pp.h"
  6 +
5 7
6 #define CO_PROCESSOR_MASK_BITS 0x03 8 #define CO_PROCESSOR_MASK_BITS 0x03
7 9
@@ -110,8 +112,15 @@ extern U16 dec_frame_size; @@ -110,8 +112,15 @@ extern U16 dec_frame_size;
110 #define TRANS_PART1_COUNT SAMPLES2DMACOUNT(TRANS_PART1_SAMPLES) 112 #define TRANS_PART1_COUNT SAMPLES2DMACOUNT(TRANS_PART1_SAMPLES)
111 #define TRANS_PART2_COUNT SAMPLES2DMACOUNT(TRANS_PART2_SAMPLES) 113 #define TRANS_PART2_COUNT SAMPLES2DMACOUNT(TRANS_PART2_SAMPLES)
112 114
113 -#define DMA_UNDERFLOW_DELAY_COUNT 32  
114 - 115 +#ifdef I2S1_DATA_OUT
  116 + #define DMA_UNDERFLOW_DELAY_COUNT 8
  117 +#else
  118 + #ifdef AUDIO_PWM_OUTPUT
  119 + #define DMA_UNDERFLOW_DELAY_COUNT 32
  120 + #else
  121 + #define DMA_UNDERFLOW_DELAY_COUNT 8
  122 + #endif
  123 +#endif
115 void app_nav_spdif_stream_reinit (void); 124 void app_nav_spdif_stream_reinit (void);
116 125
117 void dec_direct_out_24bit( int *pBuf, U16 len ); 126 void dec_direct_out_24bit( int *pBuf, U16 len );
@@ -130,9 +130,9 @@ @@ -130,9 +130,9 @@
130 #define OPL_SLAVE_ENBALE 130 #define OPL_SLAVE_ENBALE
131 131
132 /*********Choose one*************/ 132 /*********Choose one*************/
133 -//#define OPL_MODE_SINGLE_WAY  
134 -//#define OPL_MODE_TWO_WAY  
135 -#define OPL_MODE_SWF 133 +#define OPL_MODE_SINGLE_WAY // use optek link lib:optek_link_5ms.a
  134 +//#define OPL_MODE_TWO_WAY // use optek link lib:optek_link_5ms.a
  135 +//#define OPL_MODE_SWF // use optek link lib:optek_link_5ms_for_swf.a
136 136
137 #if (defined OPL_MODE_TWO_WAY || (defined OPL_MODE_SINGLE_WAY && defined OPL_MASTER_ENABLE)) 137 #if (defined OPL_MODE_TWO_WAY || (defined OPL_MODE_SINGLE_WAY && defined OPL_MASTER_ENABLE))
138 #define LC3_ENCODE_ENABLE 138 #define LC3_ENCODE_ENABLE
@@ -79,11 +79,14 @@ void Spdif_StreamConfig( void ) @@ -79,11 +79,14 @@ void Spdif_StreamConfig( void )
79 AUDIO_FIFO_STREAM_CREATE(0,STREAM_LENTH_UNKNOWN,0,0); 79 AUDIO_FIFO_STREAM_CREATE(0,STREAM_LENTH_UNKNOWN,0,0);
80 //fifo_create_file_stream(&audio_env.stream_fifo, 0, STREAM_LENTH_UNKNOWN, 0, 0); 80 //fifo_create_file_stream(&audio_env.stream_fifo, 0, STREAM_LENTH_UNKNOWN, 0, 0);
81 81
  82 +
  83 + spdif_data_parser_init();
  84 +
82 //app_main_data.playing_stream_status = STREAM_CDDA_WAIT_DATA; 85 //app_main_data.playing_stream_status = STREAM_CDDA_WAIT_DATA;
83 app_main_data.playing_stream_status = STREAM_SPDIF_SR_DETECT ; 86 app_main_data.playing_stream_status = STREAM_SPDIF_SR_DETECT ;
84 uDecSend (DECODE_SET, DECODE_SPDIF); 87 uDecSend (DECODE_SET, DECODE_SPDIF);
85 88
86 - uDecSend (DECODE_INIT, 0); 89 + //uDecSend (DECODE_INIT, 0);
87 90
88 //app_main_data.playback_state = PLAYING_MODE_PLAY; 91 //app_main_data.playback_state = PLAYING_MODE_PLAY;
89 } 92 }
@@ -24,6 +24,8 @@ @@ -24,6 +24,8 @@
24 24
25 #include "app_i2c.h" 25 #include "app_i2c.h"
26 26
  27 +#include "app_main.h"
  28 +
27 #define ADC_MASTER 29 #define ADC_MASTER
28 #define SINGLE_ENDED_OUTPUT 30 #define SINGLE_ENDED_OUTPUT
29 31
@@ -804,10 +806,16 @@ void audio_code_init(void) @@ -804,10 +806,16 @@ void audio_code_init(void)
804 806
805 SPDIF_CONFIG = temp; 807 SPDIF_CONFIG = temp;
806 808
807 -  
808 -#if 1//ndef AUDIO_PWM_OUTPUT  
809 - DA_PP_CLASSD_EN |= 0x02; //spdif_en enable  
810 -#endif 809 + if (app_main_data.share_link_role == SL_ROLE_SLAVE)
  810 + {
  811 + DA_PP_CLASSD_EN = 0x03;
  812 + }
  813 + else
  814 + {
  815 + #ifndef AUDIO_PWM_OUTPUT
  816 + DA_PP_CLASSD_EN = 0x02; //spdif_en enable
  817 + #endif
  818 + }
811 819
812 820
813 //codec setting 821 //codec setting
@@ -82,14 +82,12 @@ void dda_pp_init(void) @@ -82,14 +82,12 @@ void dda_pp_init(void)
82 #endif 82 #endif
83 83
84 84
85 -#if (SHARE_LINK_MODE == SL_SUBWOOFER)  
86 if (app_main_data.share_link_role == SL_ROLE_SLAVE) 85 if (app_main_data.share_link_role == SL_ROLE_SLAVE)
87 { 86 {
88 classd_config_ahb->pp_clk_config = 2; 87 classd_config_ahb->pp_clk_config = 2;
89 classd_config_ahb->osr_config = 0; 88 classd_config_ahb->osr_config = 0;
90 classd_config_ahb->sigma_delta_quan = 7; 89 classd_config_ahb->sigma_delta_quan = 7;
91 } 90 }
92 -#endif  
93 91
94 classd_config_ahb->sigma_delta_order = 1; 92 classd_config_ahb->sigma_delta_order = 1;
95 #if 0//def PWM_HALF_BRIDGE 93 #if 0//def PWM_HALF_BRIDGE
@@ -48,7 +48,7 @@ @@ -48,7 +48,7 @@
48 48
49 //#define I2S1_MI2SIN_B_GROUP /* only for OTK5282/83/P */ 49 //#define I2S1_MI2SIN_B_GROUP /* only for OTK5282/83/P */
50 #define I2S1_MI2SIN_BCK_LRCK_OUT //Outdead: #define I2S1_BCK_LRCK_OUT 50 #define I2S1_MI2SIN_BCK_LRCK_OUT //Outdead: #define I2S1_BCK_LRCK_OUT
51 -//#define I2S1_DATA_OUT 51 +#define I2S1_DATA_OUT
52 52
53 #define I2S1_DATA_IN 53 #define I2S1_DATA_IN
54 54
@@ -233,7 +233,7 @@ void DMA_Channel8_Init(U32 *dest, U32 *src, U32 byte_count, U8 dma_source) @@ -233,7 +233,7 @@ void DMA_Channel8_Init(U32 *dest, U32 *src, U32 byte_count, U8 dma_source)
233 233
234 pCtrl->size = DMA_TRANSMIT_SIZE_WORD; //Transfer size 234 pCtrl->size = DMA_TRANSMIT_SIZE_WORD; //Transfer size
235 pCtrl->burst_size = DMA_BURST_SINGLE; //1 235 pCtrl->burst_size = DMA_BURST_SINGLE; //1
236 - pCtrl->saddr_inc = DMA_SRC_ADDR_INC;; //Source address inc select 236 + pCtrl->saddr_inc = DMA_SRC_ADDR_FIXED;; //Source address inc select
237 pCtrl->daddr_inc = DMA_SRC_ADDR_FIXED; //Destination address inc select 237 pCtrl->daddr_inc = DMA_SRC_ADDR_FIXED; //Destination address inc select
238 pCtrl->source = dma_source; //Dma source select 238 pCtrl->source = dma_source; //Dma source select
239 pCtrl->start = 0; //not software dma start 239 pCtrl->start = 0; //not software dma start
@@ -493,6 +493,7 @@ void app_optek_link_role_sw(void) @@ -493,6 +493,7 @@ void app_optek_link_role_sw(void)
493 493
494 //in one group, the device can opterate together, should be generated by random 494 //in one group, the device can opterate together, should be generated by random
495 const u8 optek_link_group[3] = {0x3F,0xc5,0x67}; 495 const u8 optek_link_group[3] = {0x3F,0xc5,0x67};
  496 +//const u8 optek_link_group[3] = {'S',0x01,0x01};
496 //const u8 optek_link_group[3] = {'P',0x00,0x01}; 497 //const u8 optek_link_group[3] = {'P',0x00,0x01};
497 //const u8 optek_link_group[3] = {'A',0x00,0x00}; 498 //const u8 optek_link_group[3] = {'A',0x00,0x00};
498 //const u8 optek_link_group[3] = {'C',0x02,0x02}; 499 //const u8 optek_link_group[3] = {'C',0x02,0x02};
@@ -547,7 +548,7 @@ void optek_link_end_cb(u8 id) @@ -547,7 +548,7 @@ void optek_link_end_cb(u8 id)
547 #define OPTEK_LINK_HOPPING_CH 37 548 #define OPTEK_LINK_HOPPING_CH 37
548 549
549 #define OPTEK_LINK_MAX_CH 37 550 #define OPTEK_LINK_MAX_CH 37
550 -const u8 optek_link_scan_ch[OPTEK_LINK_MAX_CH] = 551 +const u8 optek_link_scan_chan[OPTEK_LINK_MAX_CH] =
551 { 552 {
552 0, 1, 2, 3, 4, 5, 6, 7, 553 0, 1, 2, 3, 4, 5, 6, 7,
553 8, 9, 10, 11, 12, 13, 14, 15, 554 8, 9, 10, 11, 12, 13, 14, 15,
@@ -560,13 +561,12 @@ const u8 optek_link_scan_ch[OPTEK_LINK_MAX_CH] = @@ -560,13 +561,12 @@ const u8 optek_link_scan_ch[OPTEK_LINK_MAX_CH] =
560 // for philips 561 // for philips
561 /* 562 /*
562 #define OPTEK_LINK_MAX_CH 8 563 #define OPTEK_LINK_MAX_CH 8
563 -const u8 optek_link_scan_ch[OPTEK_LINK_MAX_CH] = 564 +const u8 optek_link_scan_chan[OPTEK_LINK_MAX_CH] =
564 { 565 {
565 9, 10, 21, 22, 33, 34, 35, 36, 566 9, 10, 21, 22, 33, 34, 35, 36,
566 }; 567 };
567 */ 568 */
568 569
569 -  
570 u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **base_table,u8 *base_table_size,u8 scan_f) __attribute__ ((section (".internal_ram_1_text"))); 570 u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **base_table,u8 *base_table_size,u8 scan_f) __attribute__ ((section (".internal_ram_1_text")));
571 u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **base_table,u8 *base_table_size,u8 scan_f) 571 u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **base_table,u8 *base_table_size,u8 scan_f)
572 { 572 {
@@ -575,7 +575,7 @@ u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **bas @@ -575,7 +575,7 @@ u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **bas
575 else 575 else
576 *gen_table_size = OPTEK_LINK_HOPPING_CH; 576 *gen_table_size = OPTEK_LINK_HOPPING_CH;
577 577
578 - *base_table = optek_link_scan_ch; 578 + *base_table = optek_link_scan_chan;
579 *base_table_size = OPTEK_LINK_MAX_CH; 579 *base_table_size = OPTEK_LINK_MAX_CH;
580 580
581 return 0; 581 return 0;
@@ -863,24 +863,38 @@ u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id) __attrib @@ -863,24 +863,38 @@ u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id) __attrib
863 u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id) 863 u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id)
864 { 864 {
865 u8 len = 0; 865 u8 len = 0;
  866 + U8 packet_len;
866 867
867 - DBG_PIN_HIGH3;  
868 - DBG_PIN_LOW3; 868 + //DBG_PIN_HIGH3;
  869 + //DBG_PIN_LOW3;
869 870
870 if (cpy == 1) 871 if (cpy == 1)
871 { 872 {
872 #ifdef OPL_MODE_SWF 873 #ifdef OPL_MODE_SWF
873 //len = bc_tx_data.tx_len; 874 //len = bc_tx_data.tx_len;
874 -  
875 - if (fifo_get_data_len(&opl_swf_tx_fifo) >= 24) 875 +
  876 + if (optek_link_mode == TWS_SUBW_W_BT_T6_SF44K)
  877 + {
  878 + packet_len = 240;
  879 + }
  880 + else if (optek_link_mode == TWS_SUBW_W_BT_T6_SF48K)
  881 + {
  882 + packet_len = 240;
  883 + }
  884 + else
  885 + {
  886 + packet_len = 24;
  887 + }
  888 +
  889 + if (fifo_get_data_len(&opl_swf_tx_fifo) >= packet_len)
876 { 890 {
877 //bc_tx_data.tx_len = 0; 891 //bc_tx_data.tx_len = 0;
878 892
879 //CFasm_memcpy((void *)buf, (void *)bc_tx_data.tx_data,len); 893 //CFasm_memcpy((void *)buf, (void *)bc_tx_data.tx_data,len);
880 894
881 - fifo_get_data(&opl_swf_tx_fifo,buf,24); 895 + fifo_get_data(&opl_swf_tx_fifo,buf,packet_len);
882 896
883 - bc_tx_data.last_tx_len = 24; 897 + bc_tx_data.last_tx_len = packet_len;
884 } 898 }
885 else if (bc_tx_data.last_tx_len) 899 else if (bc_tx_data.last_tx_len)
886 { 900 {
@@ -914,12 +928,34 @@ u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id) @@ -914,12 +928,34 @@ u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id)
914 app_dac_receive_pcm_enable(FALSE); 928 app_dac_receive_pcm_enable(FALSE);
915 spk_out_sync_w_tx_status = SPK_AND_TX_SYNCING_STEP2; 929 spk_out_sync_w_tx_status = SPK_AND_TX_SYNCING_STEP2;
916 } 930 }
917 - else if ((spk_out_sync_w_tx_status == SPK_AND_TX_SYNCING_STEP2)&&(ext_frame == 0)) 931 + else if (spk_out_sync_w_tx_status == SPK_AND_TX_SYNCING_STEP2)
918 { 932 {
919 - //DBG_PIN_HIGH;  
920 - //DBG_PIN_LOW; 933 + U32 dma0_count = DMA_0_COUNT;
  934 +
  935 + if (adj_outsamples == 0)
  936 + {
  937 + i32 out_dma_cnt;
  938 +
  939 + out_dma_cnt = 10 - (dma0_count>>1);
  940 +
  941 + //if ((out_dma_cnt < -1) || (out_dma_cnt > 1))
  942 + if (out_dma_cnt == 0)
  943 + {
  944 + spk_out_sync_w_tx_status = SPK_AND_TX_SYNCING_STEP3;
  945 + }
  946 + else
  947 + {
  948 + adj_outsamples = out_dma_cnt;
  949 + //DBG_Printf("req adj:%d,%d,%d\r\n",adj_outsamples,dma0_count,dma8_count);
  950 + }
  951 + }
  952 +
  953 + }
  954 + else if ((spk_out_sync_w_tx_status == SPK_AND_TX_SYNCING_STEP3)&&(ext_frame == 0))
  955 + {
921 app_dac_receive_pcm_enable(TRUE); 956 app_dac_receive_pcm_enable(TRUE);
922 spk_out_sync_w_tx_status = SPK_AND_TX_SYNCED; 957 spk_out_sync_w_tx_status = SPK_AND_TX_SYNCED;
  958 + uiDecSend (DECODE_FRAME, FALSE);
923 } 959 }
924 //SOFT3_INT_SET; 960 //SOFT3_INT_SET;
925 } 961 }
@@ -1010,6 +1046,16 @@ u8 optek_link_slave_conn_cb (u8 mode, u8 *slave_max_tx_len, u8 *slave_max_rx_len @@ -1010,6 +1046,16 @@ u8 optek_link_slave_conn_cb (u8 mode, u8 *slave_max_tx_len, u8 *slave_max_rx_len
1010 { 1046 {
1011 *slave_max_tx_len = OPTEK_LINK_MASTER_NO_RX_LEN; 1047 *slave_max_tx_len = OPTEK_LINK_MASTER_NO_RX_LEN;
1012 *slave_max_rx_len = 24; 1048 *slave_max_rx_len = 24;
  1049 + }
  1050 + else if (mode == TWS_SUBW_W_BT_T6_SF44K)
  1051 + {
  1052 + *slave_max_tx_len = OPTEK_LINK_MASTER_NO_RX_LEN;
  1053 + *slave_max_rx_len = 245;
  1054 + }
  1055 + else if (mode == TWS_SUBW_W_BT_T6_SF48K)
  1056 + {
  1057 + *slave_max_tx_len = OPTEK_LINK_MASTER_NO_RX_LEN;
  1058 + *slave_max_rx_len = 245;
1013 } 1059 }
1014 #endif 1060 #endif
1015 else 1061 else
@@ -1039,7 +1085,7 @@ u8 optek_link_slave_conn_cb (u8 mode, u8 *slave_max_tx_len, u8 *slave_max_rx_len @@ -1039,7 +1085,7 @@ u8 optek_link_slave_conn_cb (u8 mode, u8 *slave_max_tx_len, u8 *slave_max_rx_len
1039 void optek_link_slave_link_loss_cb (u8 id) __attribute__ ((section (".internal_ram_1_text"))); 1085 void optek_link_slave_link_loss_cb (u8 id) __attribute__ ((section (".internal_ram_1_text")));
1040 void optek_link_slave_link_loss_cb (u8 id) 1086 void optek_link_slave_link_loss_cb (u8 id)
1041 { 1087 {
1042 - DBG_Printf("slave loss\r"); 1088 + //DBG_Printf("slave loss\r");
1043 csb_rx_count = 0; 1089 csb_rx_count = 0;
1044 app_dac_receive_pcm_enable(FALSE); 1090 app_dac_receive_pcm_enable(FALSE);
1045 //app_main_data.playing_stream_status = STREAM_WAITING_DATA; 1091 //app_main_data.playing_stream_status = STREAM_WAITING_DATA;
@@ -11,7 +11,8 @@ const char *optek_link_version_get(void); @@ -11,7 +11,8 @@ const char *optek_link_version_get(void);
11 typedef enum { 11 typedef enum {
12 SPK_AND_TX_NOTSYNC, 12 SPK_AND_TX_NOTSYNC,
13 SPK_AND_TX_SYNCING, 13 SPK_AND_TX_SYNCING,
14 - SPK_AND_TX_SYNCING_STEP2, 14 + SPK_AND_TX_SYNCING_STEP2,
  15 + SPK_AND_TX_SYNCING_STEP3,
15 SPK_AND_TX_SYNCED, 16 SPK_AND_TX_SYNCED,
16 }APK_AND_TX_SYNC_STATUS_ENUM; 17 }APK_AND_TX_SYNC_STATUS_ENUM;
17 extern volatile APK_AND_TX_SYNC_STATUS_ENUM spk_out_sync_w_tx_status; 18 extern volatile APK_AND_TX_SYNC_STATUS_ENUM spk_out_sync_w_tx_status;
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