!1 modify code by Luozs

Merge pull request !1 from ZhengJunNan/master

 {
     "files.associations": {
-        "xutility": "c"
+        "xutility": "c",
+        "app_main.h": "c"
     }
 }
\ No newline at end of file

@@ -220,7 +220,7 @@ lib/optek_lib_freeRTOS.a
 
 
 lib/optek_link_5ms.a
-
+/*lib/optek_link_5ms_for_swf.a*/
 /*
 lib/optek_link_7p5ms.a
 */

@@ -109,7 +109,7 @@ int xa_pcm_downsample_dec_frame (U8 **pout,U16 *plen)
   void *mem,*d2as_obj;
 	int frame_len;
 
-	if (optek_link_mode == TWS_SUBW_W_BT_SF44K || optek_link_mode == TWS_SUBW_W_BT_T6_SF44K || optek_link_mode == TWS_SUBW_W_BT_SF48K || optek_link_mode == TWS_SUBW_W_BT_T6_SF48K)
+	if (0)//(optek_link_mode == TWS_SUBW_W_BT_SF44K || optek_link_mode == TWS_SUBW_W_BT_T6_SF44K || optek_link_mode == TWS_SUBW_W_BT_SF48K || optek_link_mode == TWS_SUBW_W_BT_T6_SF48K)
 	{
 		frame_len = 240;
 	}

@@ -133,7 +133,7 @@ typedef struct{
 
 const APP_NAV_SOURCE source_table[] = 
 {
-//	{MEDIA_BT_HCI,app_nav_rmt_convert_bt_hci},
+	//{MEDIA_BT_HCI,app_nav_rmt_convert_bt_hci},
 	{MEDIA_AUX,app_nav_rmt_convert_aux},
 	{MEDIA_OPTICAL,app_nav_rmt_convert_spdif},
 
@@ -694,7 +694,7 @@ void app_nav_rmt_convert_aux(void)
 		app_dac_receive_pcm_enable(FALSE);
 
 		#if  defined OPL_MODE_TWO_WAY || defined OPL_MODE_SINGLE_WAY
-		#if 1
+		#if 0
 		app_change_mode_req(GAME_HEADPHONE_PT_5MS_LP,100,50);
 		#else
 		if (optek_link_mode == GAME_HEADPHONE_PT_5MS_LP || optek_link_mode == BC_SF48K_PT5MS)
@@ -826,8 +826,11 @@ void app_nav_rmt_convert_aux(void)
 		app_main_data.ui_background = app_nav_ad_pcm_pocess;
 
 		uDecSend (DECODE_SET, DECODE_PCM);
-		//uDecSend (DECODE_INIT, 0);
-		uDecSend (DECODE_FRAME, TRUE); //start to decode
+		uDecSend (DECODE_INIT, 0);
+
+		#ifndef OPTEK_LINK_ENABLE
+		uDecSend (DECODE_FRAME, FALSE); //start to decode
+		#endif
 		app_main_data.playing_stream_status = STREAM_MEDIA;
 
 #if defined AUDIO_CODEC_USED_VOL

@@ -27,7 +27,7 @@
 #include "app_sdram.h"
 #include "Audio_Device.h"
 #include "bt_common.h"
-
+#include "optek_link.h"
 
 void app_nav_rmt_convert_bt_hci(void)
 {
@@ -46,6 +46,18 @@ void app_nav_rmt_convert_bt_hci(void)
 
 		DBG_Printf("covert to BT HCI\n");
 
+#ifdef OPL_MASTER_ENABLE	
+		if(app_main_data.share_link_role != SL_ROLE_SLAVE)
+		{
+	void app_change_mode_req(u8 mode, u8 max_master_tx_len, u8 max_master_rx_len);
+			//app_change_mode_req(IDLE_W_BT,6,6);
+			app_change_mode_req(TWS_SUBW_W_BT_T6_SF44K,245,6);
+			//optek_link_role_stop();
+			delayms(100);
+		}
+#endif
+
+
 		if(app_main_data.share_link_role != SL_ROLE_SLAVE)
 		{
 			if (bt_status.bt_main_status == enBT_DISCONNECTED)

@@ -144,7 +144,7 @@ void app_dac_init (void)
 #ifdef I2S1_DATA_OUT
 	DMA_Channel0_Init((U32 *)DA_I2S_OUT_FIFO_ADDR,   (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_IIS1_OUT);
 	if (app_main_data.share_link_role == SL_ROLE_SLAVE)
-		DMA_Channel8_Init((U32 *)DA_PP_CLASSD_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_DA_PP);
+		DMA_Channel8_Init((U32 *)DA_SPDIF_OUT_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_SPDIF_DAC_OUT);
 #else
 #ifdef AUDIO_PWM_OUTPUT
 	DMA_Channel0_Init((U32 *)DA_PP_CLASSD_FIFO_ADDR, (U32 *)awOutStore.awOutSampleStore[0], DAC_OUT_FRAME_SZIE/4, SOURCE_DMA_DA_PP);
@@ -480,11 +480,13 @@ void Dma_0_TransmitIsr(void)
 	}
 }
 
+static int dma8src[4] = {0,0,0,0};
 void Dma_8_TransmitIsr (void)
 {
 	U16 len;
 	int *pBuf,i;
 
+
 	if (DMA_0_COUNT == 0)
 	{
 		if (awOut_contrls.awSize)
@@ -494,7 +496,7 @@ void Dma_8_TransmitIsr (void)
 			DMA_0_SOURCE = (int *) &awOutStore.awOutSampleStore[awOut_contrls.awIndex][0]; //Source address
 			DMA_0_COUNT = len;
 
-			DMA_8_SOURCE = (int *) &awOutStore.awOutSampleStore[0][0];
+			DMA_8_SOURCE = dma8src;//(int *) &awOutStore.awOutSampleStore[0][0];
 			DMA_8_COUNT = len - TRANS_PART2_COUNT;
 
 			/*Clear the previous out data*/
@@ -515,7 +517,7 @@ void Dma_8_TransmitIsr (void)
 			DMA_0_SOURCE = (int *) &awOutStore.awOutSampleStore[1-awOut_contrls.awIndex][0]; //Source address
 			DMA_0_COUNT = Zero_Buf_Size*2;
 
-			DMA_8_SOURCE = (int *) &awOutStore.awOutSampleStore[0][0];
+			DMA_8_SOURCE = dma8src;//(int *) &awOutStore.awOutSampleStore[0][0];
 			DMA_8_COUNT = Zero_Buf_Size*2 - TRANS_PART2_COUNT;			
 		}		
 	}
@@ -523,7 +525,7 @@ void Dma_8_TransmitIsr (void)
 	{		
 		SOFT3_INT_SET;
 
-		DMA_8_SOURCE = (int *) &awOutStore.awOutSampleStore[0][0];
+		DMA_8_SOURCE = dma8src;//(int *) &awOutStore.awOutSampleStore[0][0];
 		DMA_8_COUNT = (TRANS_PART1_COUNT + TRANS_PART2_COUNT)*2;
 	}
 }

@@ -1857,6 +1857,7 @@ detect_enter:
 				
 
 				Spdif_rcv_enable();
+				uDecSend (DECODE_INIT, 0);
 				//spdif_dec_enable ();
 			}
 			else

@@ -142,11 +142,12 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
 		
 		*pout = pDecOut;
 		*plen = AD_PCM_BLOCK_SIZE;
-		DBG_Printf("dma0:%d\r\n",DMA_0_COUNT);
+		//DBG_Printf("dma0:%d\r\n",DMA_0_COUNT);
 		return DECODE_SUCCESS;		
 	}
 
 	/************sync with dma0************/
+#if 0
 	if (inout_dma_sync_flag == FALSE)
 	{
 		U32 dma0_cnt = DMA_0_COUNT;
@@ -155,7 +156,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
 		#ifdef OPL_MODE_TWO_WAY
 		in_out_offset = 180;
 		#else
-		in_out_offset = 32;
+		in_out_offset = 64;
 		#endif
 		//i32 count = ((AD_PCM_BLOCK_SIZE/2-16) - dma0_cnt);
 		i32 count = ((AD_PCM_BLOCK_SIZE/2-in_out_offset) - dma0_cnt);
@@ -166,7 +167,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
 		{
 			//adj_outsamples = count>>1;
 			memset(pDecOut,0,AD_PCM_BLOCK_SIZE*2);
-			DBG_Printf("adj count1:%d\r\n",count);
+			//DBG_Printf("adj count1:%d\r\n",count);
 
 			if (count > AD_PCM_BLOCK_SIZE/4)
 			{
@@ -177,11 +178,13 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
 				count = (i32)(-in_out_offset);
 			}
 
-			DBG_Printf("adj count:%d\r\n",count);
+			//DBG_Printf("adj count:%d\r\n",count);
 
 			*pout = pDecOut;
 			*plen = AD_PCM_BLOCK_SIZE + (count/8)*16;
 
+			DBG_Printf("adj count:%d\r\n");
+
 			return DECODE_SUCCESS;			
 		}
 		else
@@ -189,6 +192,7 @@ int pcm_dec_decode_frame(U8 **pout,U16 *plen)
 			inout_dma_sync_flag = TRUE;
 		}
 	}
+#endif	
 	/************sync with dma0 end********/		
 
 	if (p == NULL)
@@ -709,7 +713,7 @@ void spdif_dec_init( void )
 	da_pp_channel_setting(MI2S_OUTPUT_CHANNEL_DEFAULT);
 #endif
 
-	spdif_data_parser_init();
+	//spdif_data_parser_init();
 
 	codec_malloc_init ();
 
@@ -1496,20 +1500,52 @@ void taskDec(void *pvParameters)
 					}
 
 					#ifdef OPL_MODE_SINGLE_WAY
-					app_change_mode_req(BC_SF48K_PT5MS,100,6);
-					#elif defined OPL_MODE_SWF
+					//app_change_mode_req(BC_SF48K_PT5MS,100,6);
+
 					if (app_main_data.playing_stream_sample_rate == 48000)
 					{
-						app_change_mode_req(SUBW_SF48K_PT2P5MS,24,6);
+						app_change_mode_req(BC_SF48K_PT5MS,100,6);
 					}
 					else if (app_main_data.playing_stream_sample_rate == 44100)
 					{
-						app_change_mode_req(SUBW_SF44K_PT2P5MS,24,6);
+						app_change_mode_req(BC_SF44K_PT5MS,108,6);
 					}
 					else
 					{
 						DBG_Printf("optek link not support sample rate\r\n");
 					}
+					#elif defined OPL_MODE_SWF
+					if (decode_type == DECODE_SBC)
+					{
+						/*if (app_main_data.playing_stream_sample_rate == 48000)
+						{
+							app_change_mode_req(SUBW_SF48K_PT2P5MS,24,6);
+						}
+						else if (app_main_data.playing_stream_sample_rate == 44100)
+						{
+							app_change_mode_req(SUBW_SF44K_PT2P5MS,24,6);
+						}
+						else
+						{
+							DBG_Printf("optek link not support sample rate\r\n");
+						}*/
+					}
+					else
+					{
+						if (app_main_data.playing_stream_sample_rate == 48000)
+						{
+							app_change_mode_req(SUBW_SF48K_PT2P5MS,24,6);
+						}
+						else if (app_main_data.playing_stream_sample_rate == 44100)
+						{
+							app_change_mode_req(SUBW_SF44K_PT2P5MS,24,6);
+						}
+						else
+						{
+							DBG_Printf("optek link not support sample rate\r\n");
+						}
+					}
+
 					#endif
 
 					if (app_main_data.playing_stream_chans == 1)
@@ -1641,9 +1677,6 @@ void taskDec(void *pvParameters)
 				else
 					csbm_put_tx_unencoded_data(pOut,len);
 
-				DBG_PIN_HIGH;
-				DBG_PIN_LOW;
-
 				#if 0//(SHARE_LINK_MODE != SL_TWO_WAY_AV && SHARE_LINK_MODE != SL_TWO_WAY_VV)
 				fifo_put_data(&audio_delay_fifo,pDacbuf,samples<<2);
 				fifo_get_data(&audio_delay_fifo,pDacbuf,samples<<2);
@@ -1652,14 +1685,14 @@ void taskDec(void *pvParameters)
 				//optek_hifi2_16b_to_24b(pDacbuf,pDacbuf,(samples<<1));		
 			}
 			#endif
-/*
+
 			if (pOut_up != NULL)
 			{
 				app_main_data.playing_stream_chans = 1;
 				len >>= 1;
 				pOut = pOut_up;
 			}
-*/
+
 			while(len > max_out_len)
 			{
 				slice <<= 1;
@@ -1691,6 +1724,8 @@ void taskDec(void *pvParameters)
 			I32 adj;
 			U32 hsamples = TRANS_PART1_SAMPLES/2;
 
+			adj_outsamples -= last_adj;
+
 			last_adj = 0;
 			
 			adj = adj_outsamples;
@@ -1714,8 +1749,7 @@ void taskDec(void *pvParameters)
 					last_adj = -adj;
 				}
 
-				adj_outsamples -= last_adj;
-				DBG_Printf("adj:%d,left:%d\r\n",last_adj,adj_outsamples);
+				DBG_Printf("adj:%d,left:%d\r\n",last_adj,adj_outsamples - last_adj);
 			}
 /*********sync end***************/
 

@@ -2,6 +2,8 @@
 #define _AUDIO_DEC_H_
 
 #include "hw_codec.h"
+#include "hw_da_pp.h"
+
 
 #define CO_PROCESSOR_MASK_BITS    0x03
 
@@ -110,8 +112,15 @@ extern U16 dec_frame_size;
 #define TRANS_PART1_COUNT SAMPLES2DMACOUNT(TRANS_PART1_SAMPLES)
 #define TRANS_PART2_COUNT SAMPLES2DMACOUNT(TRANS_PART2_SAMPLES)
 
-#define DMA_UNDERFLOW_DELAY_COUNT 32
-
+#ifdef I2S1_DATA_OUT
+	#define DMA_UNDERFLOW_DELAY_COUNT 8
+#else
+	#ifdef AUDIO_PWM_OUTPUT
+	#define DMA_UNDERFLOW_DELAY_COUNT 32
+	#else
+	#define DMA_UNDERFLOW_DELAY_COUNT 8
+	#endif
+#endif
 void app_nav_spdif_stream_reinit (void);
 
 void dec_direct_out_24bit( int *pBuf, U16 len );

@@ -130,9 +130,9 @@
 #define OPL_SLAVE_ENBALE
 
 /*********Choose one*************/
-//#define OPL_MODE_SINGLE_WAY
-//#define OPL_MODE_TWO_WAY
-#define OPL_MODE_SWF
+#define OPL_MODE_SINGLE_WAY  // use optek link lib:optek_link_5ms.a
+//#define OPL_MODE_TWO_WAY  // use optek link lib:optek_link_5ms.a
+//#define OPL_MODE_SWF    // use optek link lib:optek_link_5ms_for_swf.a
 
 #if (defined OPL_MODE_TWO_WAY || (defined OPL_MODE_SINGLE_WAY && defined OPL_MASTER_ENABLE))
 #define LC3_ENCODE_ENABLE

@@ -79,11 +79,14 @@ void Spdif_StreamConfig( void )
 	AUDIO_FIFO_STREAM_CREATE(0,STREAM_LENTH_UNKNOWN,0,0);
 	//fifo_create_file_stream(&audio_env.stream_fifo, 0, STREAM_LENTH_UNKNOWN, 0, 0);
 
+
+	spdif_data_parser_init();
+
 	//app_main_data.playing_stream_status = STREAM_CDDA_WAIT_DATA;
 	app_main_data.playing_stream_status = STREAM_SPDIF_SR_DETECT ;
 	uDecSend (DECODE_SET, DECODE_SPDIF);
 
-	uDecSend (DECODE_INIT, 0);
+	//uDecSend (DECODE_INIT, 0);
 
 	//app_main_data.playback_state = PLAYING_MODE_PLAY;
 }

@@ -24,6 +24,8 @@
 
 #include "app_i2c.h"
 
+#include "app_main.h"
+
 #define ADC_MASTER
 #define SINGLE_ENDED_OUTPUT
 
@@ -804,10 +806,16 @@ void audio_code_init(void)
 
     SPDIF_CONFIG = temp;
 
-
-#if 1//ndef AUDIO_PWM_OUTPUT	
-	DA_PP_CLASSD_EN |= 0x02; //spdif_en enable
-#endif
+    if (app_main_data.share_link_role == SL_ROLE_SLAVE)
+    {
+        DA_PP_CLASSD_EN = 0x03;
+    }
+    else
+    {
+    #ifndef AUDIO_PWM_OUTPUT	
+        DA_PP_CLASSD_EN = 0x02; //spdif_en enable
+    #endif
+    }
 
 
     //codec setting

@@ -82,14 +82,12 @@ void dda_pp_init(void)
 #endif
 
 
-#if (SHARE_LINK_MODE == SL_SUBWOOFER)
 	if (app_main_data.share_link_role == SL_ROLE_SLAVE)
 	{
 		classd_config_ahb->pp_clk_config = 2;
 		classd_config_ahb->osr_config = 0;
 		classd_config_ahb->sigma_delta_quan = 7;
 	}
-#endif
 
 	classd_config_ahb->sigma_delta_order = 1;
 #if 0//def PWM_HALF_BRIDGE

@@ -48,7 +48,7 @@
 
 //#define I2S1_MI2SIN_B_GROUP        /* only for OTK5282/83/P */
 #define I2S1_MI2SIN_BCK_LRCK_OUT     //Outdead: #define I2S1_BCK_LRCK_OUT
-//#define I2S1_DATA_OUT
+#define I2S1_DATA_OUT
 
 #define I2S1_DATA_IN
 

@@ -233,7 +233,7 @@ void DMA_Channel8_Init(U32 *dest, U32 *src, U32 byte_count, U8 dma_source)
 	
 	pCtrl->size = DMA_TRANSMIT_SIZE_WORD;	//Transfer size
 	pCtrl->burst_size = DMA_BURST_SINGLE;	    //1
-	pCtrl->saddr_inc = DMA_SRC_ADDR_INC;;	//Source address inc select
+	pCtrl->saddr_inc = DMA_SRC_ADDR_FIXED;;	//Source address inc select
 	pCtrl->daddr_inc = DMA_SRC_ADDR_FIXED;	//Destination address inc select
 	pCtrl->source = dma_source;			    //Dma source select
 	pCtrl->start = 0;						//not software dma start

@@ -493,6 +493,7 @@ void app_optek_link_role_sw(void)
 
 //in one group, the device can opterate together, should be generated by random
 const u8 optek_link_group[3] = {0x3F,0xc5,0x67};
+//const u8 optek_link_group[3] = {'S',0x01,0x01};
 //const u8 optek_link_group[3] = {'P',0x00,0x01};
 //const u8 optek_link_group[3] = {'A',0x00,0x00};
 //const u8 optek_link_group[3] = {'C',0x02,0x02};
@@ -547,7 +548,7 @@ void optek_link_end_cb(u8 id)
 #define OPTEK_LINK_HOPPING_CH 37
 
 #define OPTEK_LINK_MAX_CH 37
-const u8 optek_link_scan_ch[OPTEK_LINK_MAX_CH] =
+const u8 optek_link_scan_chan[OPTEK_LINK_MAX_CH] =
 {
     0,  1,  2,  3,  4,  5,  6,  7,
     8,  9,  10, 11, 12, 13, 14, 15,
@@ -560,13 +561,12 @@ const u8 optek_link_scan_ch[OPTEK_LINK_MAX_CH] =
 // for philips
 /*
 #define OPTEK_LINK_MAX_CH 8
-const u8 optek_link_scan_ch[OPTEK_LINK_MAX_CH] =
+const u8 optek_link_scan_chan[OPTEK_LINK_MAX_CH] =
 {
     9,  10,  21,  22,  33,  34,  35,  36,
 };
 */
 
-
 u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **base_table,u8 *base_table_size,u8 scan_f) __attribute__ ((section (".internal_ram_1_text")));  
 u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **base_table,u8 *base_table_size,u8 scan_f)
 {
@@ -575,7 +575,7 @@ u32 optek_link_hopping_table_size_and_base_table_get(u8 *gen_table_size,u8 **bas
     else
         *gen_table_size = OPTEK_LINK_HOPPING_CH;
 
-    *base_table = optek_link_scan_ch;
+    *base_table = optek_link_scan_chan;
     *base_table_size = OPTEK_LINK_MAX_CH;
 
     return 0;
@@ -863,24 +863,38 @@ u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id) __attrib
 u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id)
 {
     u8 len = 0;
+	U8 packet_len;
 
-	DBG_PIN_HIGH3;
-	DBG_PIN_LOW3;
+	//DBG_PIN_HIGH3;
+	//DBG_PIN_LOW3;
 
     if (cpy == 1)
     {
 #ifdef OPL_MODE_SWF
 		//len = bc_tx_data.tx_len;	
-		 		
-		if (fifo_get_data_len(&opl_swf_tx_fifo) >= 24)
+		
+		if (optek_link_mode == TWS_SUBW_W_BT_T6_SF44K)
+		{
+			packet_len = 240;
+		}
+		else if (optek_link_mode == TWS_SUBW_W_BT_T6_SF48K)
+		{
+			packet_len = 240;
+		}
+		else
+		{
+			packet_len = 24;
+		}
+
+		if (fifo_get_data_len(&opl_swf_tx_fifo) >= packet_len)
 		{
 			//bc_tx_data.tx_len = 0;
 	
 			//CFasm_memcpy((void *)buf, (void *)bc_tx_data.tx_data,len);
 
-			fifo_get_data(&opl_swf_tx_fifo,buf,24);
+			fifo_get_data(&opl_swf_tx_fifo,buf,packet_len);
 
-			bc_tx_data.last_tx_len = 24;	
+			bc_tx_data.last_tx_len = packet_len;	
 		}
 		else if (bc_tx_data.last_tx_len)
 		{		
@@ -914,12 +928,34 @@ u8 optek_link_tx_data_cb(u8 cpy, u8 *buf, u8 role, u8 ext_frame, u8 id)
 			app_dac_receive_pcm_enable(FALSE);
 			spk_out_sync_w_tx_status = SPK_AND_TX_SYNCING_STEP2;
 		}
-		else if ((spk_out_sync_w_tx_status == SPK_AND_TX_SYNCING_STEP2)&&(ext_frame == 0))
+		else if (spk_out_sync_w_tx_status == SPK_AND_TX_SYNCING_STEP2)
 		{
-			//DBG_PIN_HIGH;
-			//DBG_PIN_LOW;	
+   			U32 dma0_count = DMA_0_COUNT;
+			
+			if (adj_outsamples == 0)
+			{
+				i32 out_dma_cnt;
+
+				out_dma_cnt = 10 - (dma0_count>>1);
+
+				//if ((out_dma_cnt < -1) || (out_dma_cnt > 1))
+				if (out_dma_cnt == 0)
+				{
+					spk_out_sync_w_tx_status = SPK_AND_TX_SYNCING_STEP3;
+				}
+				else
+				{
+					adj_outsamples = out_dma_cnt; 
+					//DBG_Printf("req adj:%d,%d,%d\r\n",adj_outsamples,dma0_count,dma8_count);
+				}
+			}
+
+		}
+		else if ((spk_out_sync_w_tx_status == SPK_AND_TX_SYNCING_STEP3)&&(ext_frame == 0))
+		{	
 			app_dac_receive_pcm_enable(TRUE);
 			spk_out_sync_w_tx_status = SPK_AND_TX_SYNCED;
+			uiDecSend (DECODE_FRAME, FALSE);
 		}
 		//SOFT3_INT_SET;
     }
@@ -1010,6 +1046,16 @@ u8 optek_link_slave_conn_cb (u8 mode, u8 *slave_max_tx_len, u8 *slave_max_rx_len
 	{
 		*slave_max_tx_len = OPTEK_LINK_MASTER_NO_RX_LEN;
 		*slave_max_rx_len = 24;
+	}
+	else if (mode == TWS_SUBW_W_BT_T6_SF44K)
+	{
+		*slave_max_tx_len = OPTEK_LINK_MASTER_NO_RX_LEN;
+		*slave_max_rx_len = 245;
+	}
+	else if (mode == TWS_SUBW_W_BT_T6_SF48K)
+	{
+		*slave_max_tx_len = OPTEK_LINK_MASTER_NO_RX_LEN;
+		*slave_max_rx_len = 245;
 	}		
 	#endif	
 	else
@@ -1039,7 +1085,7 @@ u8 optek_link_slave_conn_cb (u8 mode, u8 *slave_max_tx_len, u8 *slave_max_rx_len
 void optek_link_slave_link_loss_cb (u8 id)  __attribute__ ((section (".internal_ram_1_text")));
 void optek_link_slave_link_loss_cb (u8 id)
 {
-	DBG_Printf("slave loss\r");
+	//DBG_Printf("slave loss\r");
 	csb_rx_count = 0;
 	app_dac_receive_pcm_enable(FALSE);
 	//app_main_data.playing_stream_status = STREAM_WAITING_DATA;

@@ -11,7 +11,8 @@ const char *optek_link_version_get(void);
 typedef enum {
 	SPK_AND_TX_NOTSYNC,
 	SPK_AND_TX_SYNCING,
-	SPK_AND_TX_SYNCING_STEP2,	
+	SPK_AND_TX_SYNCING_STEP2,
+    SPK_AND_TX_SYNCING_STEP3,	
 	SPK_AND_TX_SYNCED,
 }APK_AND_TX_SYNC_STATUS_ENUM;
 extern volatile APK_AND_TX_SYNC_STATUS_ENUM spk_out_sync_w_tx_status;