optek_d2as_table.c
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#include "c_def.h"
//#include "debug.h"
#include "oem.h"
#ifdef OPTEK_DSRC_ENABLE
#include "optek_d2as_table.h"
#if 1
//88200->44100; 176400->88200 LPF h = fdesign.lowpass('n,fst,ast',8,22000,25,88200); Hd=design(h,'cheby2');
//20kHz, -0.9db
const int spdif_lpf_88200_to_44100[] = {
0x40000000, 0x354e8bef, 0x01b0480e, 0x354e8bef, 0xf6155f89, 0x36380065,
0x40000000, 0x40000000, 0x16eb088b, 0x40000000, 0x04b81d84, 0x24d940b6,
0x40000000, 0x40000000, 0x434a7890, 0x40000000, 0x1a7b8715, 0x15105a03,
0x40000000, 0x40000000, 0x768c97f3, 0x40000000, 0x2c45e68a, 0x0a34ae13
};
//96000->48000; 192000->96000 LPF h = fdesign.lowpass('n,fst,ast',8,24000,40,96000); Hd=design(h,'cheby2');
//64000->32000; 128000->64000
//20kHz, -0.9db
const int spdif_lpf_96000_to_48000[] = {
0x40000000, 0x2db8b193, 0x01c6201d, 0x2db8b193, 0xea29360f, 0x330e4d33,
0x40000000, 0x40000000, 0x175bef88, 0x40000000, 0xf7859e4b, 0x1e21396b,
0x40000000, 0x40000000, 0x439ec5ab, 0x40000000, 0x07e255ed, 0x0d7adb01,
0x40000000, 0x40000000, 0x769d2355, 0x40000000, 0x13d13c6d, 0x033b3ce7
};
//176400->44100 LPF h = fdesign.lowpass('n,fst,ast',8,22000/2,22,88200); Hd=design(h,'cheby2');
//20kHz, -0.97db
const int spdif_lpf_176400_to_44100[] = {
0x40000000, 0x360e1d3a, 0xb47a5979, 0x360e1d3a, 0xa67b108e, 0x3a1b835f,
0x40000000, 0x40000000, 0xb2b1ef81, 0x40000000, 0xb7e47df3, 0x2d00855a,
0x40000000, 0x40000000, 0xdb2a5276, 0x40000000, 0xd7078588, 0x1a1f3975,
0x40000000, 0x40000000, 0x515457b2, 0x40000000, 0xfd4f2479, 0x0454bb1c
};
//192000->48000; 192000->96000 LPF h = fdesign.lowpass('n,fst,ast',8,12000,33,96000); Hd=design(h,'cheby2');
//128000->32000; 128000->64000
//20kHz, -0.9db
const int spdif_lpf_192000_to_48000[] = {
0x40000000, 0x2df184b0, 0xbfee0a2b, 0x2df184b0, 0xa390fdf0, 0x3840159c,
0x40000000, 0x40000000, 0xb2e67d70, 0x40000000, 0xb50abec4, 0x2888da30,
0x40000000, 0x40000000, 0xdb762408, 0x40000000, 0xcda1f178, 0x15dbcdbe,
0x40000000, 0x40000000, 0x518584f8, 0x40000000, 0xe55f5156, 0x04db0142
};
const int spdif_lpf_bypass[] = {
0x40000000, 0x40000000, 0, 0, 0, 0,
0x40000000, 0x40000000, 0, 0, 0, 0,
0x40000000, 0x40000000, 0, 0, 0, 0,
0x40000000, 0x40000000, 0, 0, 0, 0,
};
#endif
#endif //OPTEK_DSRC_ENABLE