hw_misc.h 1.41 KB
#ifndef _HW_MISC_H_
#define _HW_MISC_H_

extern U32 SystemClock;


#define PLL_POWER_MASK    0x00000001

#define CRYSTAL_CLK_MASK  0x00000040

#define ADC_CLK_MASK      0x00000001

#define SDRAM_CLK_MASK    0x00000001


//REG_CLKGATE:1 is enable, 0 gated.
#define	REG_CLKGATE_USB			0x00000001
#define	REG_CLKGATE_SD			0x00000002
#define	REG_CLKGATE_WATCHDOG	0x00000004
#define	REG_CLKGATE_ROTARY		0x00000008
#define	REG_CLKGATE_I2C			0x00000010
#define	REG_CLKGATE_PWM			0x00000020
#define	REG_CLKGATE_UART0		0x00000040
#define	REG_CLKGATE_UART1		0x00000080
#define	REG_CLKGATE_SPI			0x00000100
#define	REG_CLKGATE_GPIO		0x00000200

#define	REG_CLKGATE_I2S			0x00000400
#define	REG_CLKGATE_ASTRI		0x00000800
#define	REG_CLKGATE_LCD			0x00001000
#define	REG_CLKGATE_LCD_DOT		0x00002000
#define	REG_CLKGATE_JPEG		0x00004000

void misc_clkgate_init( void );
void misClockFreq_Set (I16 type);
void misClockFreq_Set_Bybass (void);
void misClockFreq_Set_RtcClk (void);
void miscPll_power_down(void);
void miscPll_power_up(void);
void miscCrystal_disable(void);
void miscCrystal_enable(void);
void miscAdc_clk_disable(void);
void miscAdc_clk_enable(void);
void misSdram_clk_disable(void);
void misSdram_clk_enable(void);

void misSdram_func_clr(void);

void miscClock_gate_set(U32 clk_gate);
void miscClock_gate_clr(U32 clk_gate);

void miscBass_set(U8 enable);
void miscEq_set(U8 eq, I8 val);

void vSetCdromMode (U8 Mode);

#endif //_HW_MISC_H_