SpiFlash_W25QXX.h
2.03 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
#ifndef _SPIFLASH_W25QXX_H_
#define _SPIFLASH_W25QXX_H_
//#define SPI_FLASH_TEST
//Status Register 1
//Statue Register protect 0
#define SPI_FLASH_SRP0_MASK 0x80
//Sector protect
#define SPI_FLASH_SP_MASK 0x40
//Top or Bottom protect
#define SPI_FLASH_TB_MASK 0x20
//Block protect
#define SPI_FLASH_BP2_MASK 0x10
#define SPI_FLASH_BP1_MASK 0x08
#define SPI_FLASH_BP0_MASK 0x04
#define SPI_FLASH_WENABLE_MASK 0x02
#define SPI_FLASH_BUSY_MASK 0x01
//Status Register 2
#define SPI_FLASH_STATUS2_RSRVD_MASK 0xFC
#define SPI_FLASH_Q_ENABLE_MASK 0x02
#define SPI_FLASH_SRP1_MASK 0x01
#ifdef SPI_FLASH_WINBOND
//#define ADDR_SPI_FAST_PAGE_PROGRAM (ADDR_SPI_CMD + 0x3200) //page program
#define SFLASH_4BIT_ENABLE 0x0200
#define SFLASH_4BIT_DISABLE 0x0000
#endif
#ifdef SPI_FLASH_MX
//#define ADDR_SPI_FAST_PAGE_PROGRAM (ADDR_SPI_CMD + 0x3800) //page program
#endif
#define SFLASH_QUAD_ENABLE (ADDR_SPI_WR_STATUS_2BYTES = 0x0200)
#define SFLASH_QUAD_DISABLE (ADDR_SPI_WR_STATUS_2BYTES = 0x0000)
void W25QXX_Init(void);
void W25QXX_Open(void);
void W25QXX_Close(void);
void W25QXX_Chip_Erase(void);
void W25QXX_Sector_Erase(U32 sector_addr);
void W25QXX_Block_Erase(U32 block_addr);
U8 W25QXX_Page_Write(U32 page_addr, U32 *pBuf, U32 byte_len);
U8 W25QXX_Sector_Write(U32 sector_addr, U32 *pBuf, U32 byte_len);
U8 W25QXX_Block_Write(U32 block_addr, U32 *pBuf, U32 byte_len);
U8 W25QXX_Erase_Verify(U32 addr, U32 byte_len);
U8 W25QXX_Write_Verify(U32 addr, U32 *pBuf, U32 byte_len);
U8 W25QXX_Read_Data(U32 addr, U32 *pBuf, U32 byte_len);
#define SFLASH_DEV_W25QXX W25QXX_Init, \
W25QXX_Open, \
W25QXX_Close, \
W25QXX_Chip_Erase, \
W25QXX_Sector_Erase, \
W25QXX_Block_Erase, \
W25QXX_Page_Write, \
W25QXX_Sector_Write, \
W25QXX_Block_Write, \
W25QXX_Erase_Verify, \
W25QXX_Write_Verify, \
W25QXX_Read_Data
#endif //_SPIFLASH_W25QXX_H_