#include "c_def.h"
#include "debug.h"
#include "oem.h"


#ifdef SD_ENABLE

#include "hw_timer.h"

#include "mem_reloc.h"

#include "sdif.h"
#include "sd.h"
#include "sdhcd.h"


#if 0
//U16 sd_readBlocks( U8 *buf, U32 lba, U16 blkcnt ) __INTERNAL_RAM_TEXT;
//static int sdmemCmd_readSingleBlk( U8 *buf, U32 lba ) __INTERNAL_RAM_TEXT;
///static int sdmemCmd_readMultiBlks( U8 *buf, U32 lba, U16 blkcnt ) __INTERNAL_RAM_TEXT;
//static int hs_cmdProtocol (U16 cmd, U32 argu, U32 *resp, 
//							U8 *data, U32 *blkcnt, U32 *bytes) __INTERNAL_RAM_TEXT;
#endif

//static int checkResponse( U8 respType, U32 *resp ) __INTERNAL_RAM_TEXT;


//#define SD_BUS_1_BIT

#ifdef SD_DMA_TRANSFER
#define SD_PIO_MODE			enTM_PIO_DMA
#else
#define SD_PIO_MODE			enTM_PIO
#endif

#define SD_FPP_SPEED		SD_FPP_DEFAULT//SD_FPP_TYPICAL//SD_FPP_TEST

//#define	sddbg_assert		debug_assert
#define	sddbg_assert(x)		
#define	sddbg_assert2		debug_assert

//SD cmd define
typedef enum {
	SD_CMD_NULL	=	-1,

	//SD
	SD_CMD_GO_IDLE_STATE,				//CMD0
	SD_CMD_ALL_SEND_CID,				//CMD2
	SD_CMD_SEND_RELATIVE_ADDR,			//CMD3	
	SD_CMD_SET_DSR,						//CMD4
	SD_CMD_SEL_DESEL_CARD,				//CMD7
	SD_CMD_SEND_IF_COND,				//CMD8
	SD_CMD_SEND_CSD,					//CMD9
	SD_CMD_SEND_CID,					//CMD10
	SD_CMD_STOP_TRANSMISSION,			//CMD12
	SD_CMD_SEND_STATUS,					//CMD13

	//11
	SD_CMD_GO_INACTIVE_STATE,			//CMD15

	SD_CMD_SET_BLOCKLEN,				//CMD16
	SD_CMD_READ_SINGLE_BLOCK,			//CMD17
	SD_CMD_READ_MULTIPLE_BLOCK,			//CMD18
	SD_CMD_WRITE_SINGLE_BLOCK,			//CMD24
	SD_CMD_WRITE_MULTIPLE_BLOCK,		//CMD25

	SD_CMD_LOCK_UNLOCK,					//CMD42

	SD_CMD_APP_CMD,						//CMD55
	SD_CMD_ACMD_SET_BUS_WIDTH,			//ACMD6
	SD_CMD_ACMD_SD_STATUS,				//ACMD13

	//21
	SD_CMD_ACMD_SEND_OP_COND,			//ACMD41
	SD_CMD_ACMD_SET_CLK_CARD_DET,		//ACMD42
	SD_CMD_ACMD_SEND_SCR,				//ACMD51

	SD_CMD_SWITCH_FUNC,					//CMD6

	//SDIO
	SD_CMD_IO_SEND_OP_COND,				//CMD5
	SD_CMD_IO_RW_DIRECT,				//CMD52
	SD_CMD_IO_RW_EXTEND,				//CMD53

	//MMC
	SD_CMD_MMC_SEND_OP_COND,			//CMD1
	SD_CMD_MMC_SEND_RELATIVE_ADDR,		//CMD3
	
	//abort
	SD_CMD_ABORT,						//CMD12

	//31
	SD_CMD_MAX

}	enum_SD_MEM_CMD;

const CARD_CMD SD_CMD_ARRAY[SD_CMD_MAX]	=	{
	{	0,		enCMDT_BC,		enCMDC_CMD,		enRESP_NONE,	enDIR_NONE,			0,		FALSE	},		//SD_CMD_GO_IDLE_STATE
	{	2,		enCMDT_BCR,		enCMDC_CMD,		enRESP_R2,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_ALL_SEND_CID
	{	3,		enCMDT_BCR,		enCMDC_CMD,		enRESP_R6,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_SEND_RELATIVE_ADDR

	{	4,		enCMDT_BC,		enCMDC_CMD,		enRESP_NONE,	enDIR_NONE,			0,		FALSE	},		//SD_CMD_SET_DSR
	{	7,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R1B,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_SEL_DESEL_CARD
	{	8,		enCMDT_BCR,		enCMDC_CMD,		enRESP_R7,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_SEND_IF_COND		
	{	9,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R2,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_SEND_CSD
	{	10,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R2,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_SEND_CID
	{	12,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R1B,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_STOP_TRANSMISSION
	{	13,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R1,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_SEND_STATUS
	{	15,		enCMDT_AC,		enCMDC_CMD,		enRESP_NONE,	enDIR_NONE,			0,		FALSE	},		//SD_CMD_GO_INACTIVE_STATE
                                                                                        		
	{	16,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R1,		enDIR_NONE,			2,		FALSE	},		//SD_CMD_SET_BLOCKLEN
	{	17,		enCMDT_ADTC,	enCMDC_CMD,		enRESP_R1,		enDIR_CARD2HOST,	2,		FALSE	},		//SD_CMD_READ_SINGLE_BLOCK
	{	18,		enCMDT_ADTC,	enCMDC_CMD,		enRESP_R1,		enDIR_CARD2HOST,	2,		FALSE	},		//SD_CMD_READ_MULTIPLE_BLOCK
	{	24,		enCMDT_ADTC,	enCMDC_CMD,		enRESP_R1,		enDIR_HOST2CARD,	4,		FALSE	},		//SD_CMD_WRITE_SINGLE_BLOCK
	{	25,		enCMDT_ADTC,	enCMDC_CMD,		enRESP_R1,		enDIR_HOST2CARD,	4,		FALSE	},		//SD_CMD_WRITE_MULTIPLE_BLOCK

	{	42,		enCMDT_ADTC,	enCMDC_CMD,		enRESP_R1,		enDIR_HOST2CARD,	7,		FALSE	},		//SD_CMD_LOCK_UNLOCK


	{	55,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R1,		enDIR_NONE,			8,		FALSE	},		//SD_CMD_APP_CMD
	{	6,		enCMDT_ACR,		enCMDC_ACMD,	enRESP_R1,		enDIR_NONE,			8,		FALSE	},		//SD_CMD_ACMD_SET_BUS_WIDTH
	{	13,		enCMDT_ADTC,	enCMDC_ACMD,	enRESP_R1,		enDIR_CARD2HOST,	8,		FALSE	},		//SD_CMD_ACMD_SD_STATUS
	{	41,		enCMDT_BCR,		enCMDC_ACMD,	enRESP_R3,		enDIR_NONE,			8,		FALSE	},		//SD_CMD_ACMD_SEND_OP_COND
	{	42,		enCMDT_ACR,		enCMDC_ACMD,	enRESP_R1,		enDIR_NONE,			8,		FALSE	},		//SD_CMD_ACMD_SET_CLK_CARD_DET
	{	51,		enCMDT_ADTC,	enCMDC_ACMD,	enRESP_R1,		enDIR_CARD2HOST,	8,		FALSE	},		//SD_CMD_ACMD_SEND_SCR

	{	6,		enCMDT_ADTC,	enCMDC_CMD,		enRESP_R1,		enDIR_CARD2HOST,	10,		FALSE	},		//SD_CMD_SWITCH_FUNC		

	//SDIO
	{	5,		enCMDT_BCR,		enCMDC_CMD,		enRESP_R4,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_IO_SEND_OP_COND ?
	{	52,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R5,		enDIR_NONE,			9,		FALSE	},		//SD_CMD_IO_RW_DIRECT ?
	{	53,		enCMDT_ADTC,	enCMDC_CMD,		enRESP_R5,		0,					9,		FALSE	},		//SD_CMD_IO_RW_EXTEND	?

	//MMC
	{	1,		enCMDT_BCR,		enCMDC_CMD,		enRESP_R3,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_MMC_SEND_OP_COND ?
	{	3,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R1,		enDIR_NONE,			0,		FALSE	},		//SD_CMD_MMC_SEND_RELATIVE_ADDR ?

	//abort
	{	12,		enCMDT_ACR,		enCMDC_CMD,		enRESP_R1B,		enDIR_NONE,			0,		TRUE	},		//SD_CMD_ABORT

};



typedef	struct {
	int (*open) (void);
	int (*close) (void);
	int (*readBlks) (U8 *buf, U32 lba, U16 blkcnt );
	int (*writeBlks) (U8 *buf, U32 lba, U16 blkcnt );
}	MEM_CARD_DRIVER;

typedef	struct {
	int (*open) (void);
	int (*close) (void);
}	SDIO_CARD_DRIVER;



typedef enum {
	
	enCSTATE_INACTIVE	=	-1,
	
	enCSTATE_IDLE,
	enCSTATE_READY,
	enCSTATE_IDENTIFY,

	enCSTATE_STANDBY,
	enCSTATE_TRANSFER,
	enCSTATE_SEND_DATA,
	enCSTATE_RECV_DATA,
	enCSTATE_PROGRAM,
	enCSTATE_DISCONNECT,

	enCSTATE_SDIO		=	15

}	enum_CARD_STATE;


typedef enum {
	enHSTATE_STANDBY,
	enHSTATE_IDLE,
	enHSTATE_PNP,
	enHSTATE_TRANSFER
}	enum_HOST_STATE;



//CSD
#define	CSD_V10			(1 << 1)
#define	CSD_V20			(1 << 0)

typedef	enum {
	en25MBPS,
	en50MBPS
}	enum_MAX_BIT_RATE;

#define	CSD_TRASN_SPEED_25MBPS	0x32
#define	CSD_TRASN_SPEED_50MBPS	0x5A

#define	CSD_PERM_WP		(1 << 1)
#define	CSD_TMP_WP		(1 << 0)

//SCR
#define	SCR_REG_BYTES	8

#define	SCR_VSPEC_10	(1 << 0)
#define	SCR_VSPEC_11	(1 << 1)
#define	SCR_VSPEC_20	(1 << 2)

#define	SCR_BUSWIDTH_1BIT	(1 << 0)
#define	SCR_BUSWIDTH_4BIT	(1 << 2)

//DSR
#define	DSR_REG_25MHZ	0x404
#define	DSR_REG_50MHZ	0x808


typedef	struct {
	U32	OCR;
	U32	CID[4];
	U32	CSD[4];
	U16	RCA;
	U16	DSR;
	U32	SCR[2];
}	CARD_REGISTERS;


#define	CARD_BLOCK_SIZE		512

#define	R2_DATA_SIZE	4

#define	SD_BUSWIDTH_1BIT	1
#define	SD_BUSWIDTH_4BIT	4

typedef	struct {
	U8	cardType;	
	U8	SDHC;
	U8	v2;

	//CSD
	U8	vcsd;
	U8	maxBitRate;
	U16	ccc;
	U8	dsrImp;
	U16	maxBlkSize;
	U16	blkSize;	
	U32	capacity;
	U8	wp;

	//SCR
	U8	vspec;
	U8	buswidth;
}	CARD_INFO;

#define	SD_STATUS_SIZE	64

typedef	struct {
	U8	cardType;	
	U8	errRetry;

	U8	cardState;
	U8	hostState;

	U32	cardStatus;
	U8	sdStatus[SD_STATUS_SIZE];

	U8	buswidth;
	U32	khz;

	const MEM_CARD_DRIVER	*sdmemDriver;
	const MEM_CARD_DRIVER	*mmcDriver;
	const SDIO_CARD_DRIVER	*sdioDriver;
	
	CARD_REGISTERS	cardRegister;
	CARD_INFO	cinfo;
} SD_DATA;

SD_DATA	sdData;


#define	CARD_STATUS_SDMEM_ERR_MASK		0xFFF98008
#define	CARD_STATUS_SDIO_ERR_MASK		0x80C80000

#define	CARD_CUR_STATE_MASK			(0x0F << 9)
#define	CARD_CUR_STATE_SHIFT		9


static int checkResponse( U8 respType, U32 *resp )
{
	SD_DATA *psd	=	&sdData;
	int ret = TRUE;

	return TRUE;


	switch( respType )
	{
	case enRESP_NONE:
		break;

	case enRESP_R1:			//48 bits 	(32)
	case enRESP_R1B:		//48 

		psd->cardStatus	=	*resp;		
		switch( psd->cardType ) {
		case enCARD_SDMEM:
			if( *resp & CARD_STATUS_SDMEM_ERR_MASK )	return FALSE;
			psd->cardState	=	(*resp & CARD_CUR_STATE_MASK) >> CARD_CUR_STATE_SHIFT;
			break;

		case enCARD_MMC:
			break;

		case enCARD_SDIO:
			if( *resp & CARD_STATUS_SDIO_ERR_MASK )	return FALSE;
			DBG_Assert( (*resp & CARD_CUR_STATE_MASK) == enCSTATE_SDIO );
		default:
			DBG_Assert(0);
		}

		break;

	case enRESP_R2:		//136 		(120)
	case enRESP_R3:		//48	
	case enRESP_R4:		//48
	case enRESP_R5:		//48
	case enRESP_R5B:		//48
	case enRESP_R6:		//48
	case enRESP_R7:		//48
		break;
	}

	return ret;
}


//#define DBG_SD1_PRINTF    DBG_Printf
#define DBG_SD1_PRINTF 

//#define DBG_SD2_PRINTF    DBG_Printf
#define DBG_SD2_PRINTF 
	
static int hs_cmdProtocol (U16 cmd, U32 argu, U32 *resp, 
							U8 *data, U32 *blkcnt, U32 *bytes)
{
//#define MAX_CMD_LOOP    2
#define MAX_CMD_LOOP    4

	int loops = 0;
	SD_DATA *psd	=	&sdData;
	int ret;

	const CARD_CMD *pcmd;
	DBG_assert( cmd < SD_CMD_MAX );

	if( !sdhcd_isCardPresent() )
	{
		return enTRANS_CARD_REMOVED;
	}

	if( SD_CMD_ARRAY[cmd].category == enCMDC_ACMD )
	{
		U32	R1;
		U32	argument;
		pcmd = SD_CMD_ARRAY + SD_CMD_APP_CMD;
		
		loops = 0;
		argument	=	(U32)psd->cardRegister.RCA << 16;
		while ( ++loops < MAX_CMD_LOOP )
		{
			DBG_SD1_PRINTF("1 CMD:%d, argu:0x%x\n\r", pcmd->index, argument);
			ret = sdhcd_transferProtocol( pcmd, argument, &R1, NULL, NULL, NULL, NULL );
			DBG_assert( ret == enTRANS_OK );
			DBG_SD1_PRINTF("1 return:%d\n\r", ret);
			//delayms(1);
			delayus(1);
			if(ret != enTRANS_OK )
			{
				continue;
			}

			ret = checkResponse( pcmd->respType, &R1 );
			DBG_assert( ret );
			if( ret )
			{
				break;
			}
			else
			{
				ret = enTRANS_RESP_ERR;
			}
		}

		if( loops >= MAX_CMD_LOOP )
		{
			return ret;
		}
	}

	loops = 0;
	pcmd	=	SD_CMD_ARRAY + cmd;
	while ( ++loops < MAX_CMD_LOOP )
	{
		DBG_SD2_PRINTF("2 CMD:%d, argu:0x%x\n\r", pcmd->index, argu);
		ret	=	sdhcd_transferProtocol( pcmd, argu, resp, data, blkcnt, bytes, NULL );
		DBG_assert( ret == enTRANS_OK );
		DBG_SD2_PRINTF("2 return:%d\n\r", ret);
		//delayms(1);
		delayus(1);
		if( ret != enTRANS_OK )
		{
			continue;
		}

#if 1//if using gpio mode, the code below is used, cann't be deleted
		ret = checkResponse( pcmd->respType, resp );
		DBG_assert( ret );
		if( ret )
		{
			ret = enTRANS_OK;
			break;
		}
		else
		{
			ret = enTRANS_RESP_ERR;
		}
#endif
	}

	if (ret)
	{
		DBG_Printf("3 return:%d\n\r", ret);
	}

	return ret;
}


//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//	SD mem card
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 

static int sdmemCmd_stopTrans( U32 *R1 )
{
	int ret;
	U32 R1b;

	ret	=	hs_cmdProtocol( SD_CMD_STOP_TRANSMISSION, 0, &R1b, NULL, NULL, NULL ); //send stop comand by CMD12
	DBG_assert( ret == enTRANS_OK );
	
	return (ret == enTRANS_OK);
}

static int sdmemCmd_sendCardStatus( U32 *stat )
{
	SD_DATA *psd	=	&sdData;

	int ret;

	U32	argu;
	U32 R1;

	*stat = 0;

	argu	=	(U32)psd->cardRegister.RCA << 16;
	ret	=	hs_cmdProtocol( SD_CMD_SEND_STATUS, argu, &R1, NULL, NULL, NULL );
	sddbg_assert( ret == enTRANS_OK );

	if( ret == enTRANS_OK )	*stat = R1;

	return (ret == enTRANS_OK);
}

static int sdmemCmd_readSingleBlk( U8 *buf, U32 lba )
{
	SD_DATA *psd	=	&sdData;

	int ret;
	U32 R1;
	U32	blkcnt = 1;

	if( !psd->cinfo.SDHC ) {
		lba *=	psd->cinfo.blkSize;
	}
	ret	=	hs_cmdProtocol( SD_CMD_READ_SINGLE_BLOCK, lba, &R1, buf, &blkcnt, NULL );
	DBG_assert(ret == enTRANS_OK);
	DBG_assert( blkcnt == 1 );

	return (ret == enTRANS_OK) ? 1 : 0;
}

#define	CARD_STATE_MASK			(0x0F << 9)
#define	CARD_STATE_PRG			(7 << 9)
#define	CARD_STATE_TRAN			(4 << 9)
#define	CARD_STATE_DATA			(5 << 9)
#define	CARD_STATE_RCV			(6 << 9)

static int sdmemCmd_readMultiBlks( U8 *buf, U32 lba, U16 blkcnt )
{
	SD_DATA *psd	=	&sdData;

	int ret;
	U32 R1;
	U32	blks	=	blkcnt;

	if( !psd->cinfo.SDHC )
	{
		lba *=	psd->cinfo.blkSize;
	}
	ret	=	hs_cmdProtocol( SD_CMD_READ_MULTIPLE_BLOCK, lba, &R1, buf, &blks, NULL ); //send data by CMD18
	DBG_assert(ret == enTRANS_OK);
	DBG_assert( blkcnt == blks );

	if(ret == enTRANS_OK)
	{
		//timer_delayms(5);
		ret	=	sdmemCmd_stopTrans( &R1 );
		sddbg_assert( ret );
		sddbg_assert( (R1 & CARD_STATE_MASK) == CARD_STATE_TRAN  );
	}
	else
	{
		ret = FALSE;
	}

	return ret ? blks : 0;
}

#define	CARD_PROGRAM_MAX_LOOP	1024*10

static int sdmemCmd_writeSingleBlk( U8 *buf, U32 lba )
{
	SD_DATA *psd	=	&sdData;

	int ret;
	U32 R1;
	U32	blkcnt = 1;

	if( !psd->cinfo.SDHC ) {
		lba *=	psd->cinfo.blkSize;
	}
	ret	=	hs_cmdProtocol( SD_CMD_WRITE_SINGLE_BLOCK, lba, &R1, buf, &blkcnt, NULL );
	DBG_assert(ret == enTRANS_OK);
	DBG_assert( blkcnt == 1 );

	if( ret == enTRANS_OK ) {
		U32	stat;
		U32	tmp = 0;
		
		while ( tmp ++ < CARD_PROGRAM_MAX_LOOP ) {
			ret = sdmemCmd_sendCardStatus( &stat );
			sddbg_assert( ret );
			stat &=	CARD_STATE_MASK;
			if( (stat != CARD_STATE_PRG) && (stat != CARD_STATE_TRAN) ) {
				sddbg_assert(0);
				return 0;
			}
			if( !ret )	break;
			if( ret && (stat == CARD_STATE_TRAN) )	break;

			timer_delayus(10);
		}
		if( tmp >= CARD_PROGRAM_MAX_LOOP )	ret = FALSE;
	}
	else	ret = FALSE;

	return ret ? 1 : 0;
}


static int sdmemCmd_writeMultiBlks( U8 *buf, U32 lba, U16 blkcnt )
{

	SD_DATA *psd	=	&sdData;

	int ret;
	U32 R1;
	U32	blks	=	blkcnt;

	psd->errRetry		=	FALSE;

	if( !psd->cinfo.SDHC ) {
		lba *=	psd->cinfo.blkSize;
	}
	ret	=	hs_cmdProtocol( SD_CMD_WRITE_MULTIPLE_BLOCK, lba, &R1, buf, &blks, NULL );
	sddbg_assert(ret == enTRANS_OK);
	sddbg_assert( blkcnt == blks );

	if( ret == enTRANS_OK ) {
		ret	=	sdmemCmd_stopTrans( &R1 );
		sddbg_assert( ret );
		sddbg_assert( (R1 & CARD_STATE_MASK) == CARD_STATE_TRAN  );
#if	1
		if( ret ) {
			U32	stat;
			U32	tmp = 0;

			while ( tmp ++ < CARD_PROGRAM_MAX_LOOP ) {
				ret = sdmemCmd_sendCardStatus( &stat );
				sddbg_assert2( ret );
				stat &=	CARD_STATE_MASK;
				if( (stat != CARD_STATE_PRG) && (stat != CARD_STATE_TRAN) ) {
					sddbg_assert2(0);
					return 0;
				}
				if( !ret )	break;
				if( ret && (stat == CARD_STATE_TRAN) )	break;
				timer_delayus(10);
			}
			if( tmp >= CARD_PROGRAM_MAX_LOOP )	ret = FALSE;
		}
#endif
	}
	else	ret = FALSE;

	return ret ? blks : 0;
}
 

static int sdmem_readBlks( U8 *buf, U32 lba, U16 blkcnt )
{
	SD_DATA *psd	=	&sdData;

	DBG_assert( blkcnt > 0 );
	DBG_assert( (psd->hostState == enHSTATE_TRANSFER) && (psd->cardState == enCSTATE_TRANSFER) );

	if( blkcnt == 1 ) {
		return sdmemCmd_readSingleBlk( buf, lba );
	}
	else {
		return sdmemCmd_readMultiBlks( buf, lba, blkcnt );
	}
}

static int sdmem_writeBlks( U8 *buf, U32 lba, U16 blkcnt )
{
	SD_DATA *psd	=	&sdData;

	DBG_assert( blkcnt > 0 );
	DBG_assert( (psd->hostState == enHSTATE_TRANSFER) && (psd->cardState == enCSTATE_TRANSFER) );

	if( blkcnt == 1 ) {
		return sdmemCmd_writeSingleBlk( buf, lba );
	}
	else {
		return sdmemCmd_writeMultiBlks( buf, lba, blkcnt );
	}
}



static U32 endianSwitch32( U32 d )
{
	d = (d >> 16) | (d << 16);
	d = ((d << 8) & 0xFF00FF00) | ((d >> 8) & 0xFF00FF);
	return d;
}

static int sdAnalyzeCSD( U8 *csd, CARD_INFO *cinfo )
{
	U32	tmp;

	// %14 
	cinfo->vcsd		=	csd[15] >> 6;
	DBG_assert( (cinfo->vcsd & CSD_V10) || (cinfo->vcsd & CSD_V20) );
	if( cinfo->vcsd	== 0 )	cinfo->vcsd	 = CSD_V10;
	
	DBG_assert( (csd[12] == CSD_TRASN_SPEED_25MBPS) || (csd[12] == CSD_TRASN_SPEED_50MBPS) );
	if( csd[12] == CSD_TRASN_SPEED_25MBPS ) {
		cinfo->maxBitRate	=	en25MBPS;
	}
	else if( csd[12] == CSD_TRASN_SPEED_50MBPS ) {
		cinfo->maxBitRate	=	en50MBPS;
	}
	else {
		DBG_assert(0);
		cinfo->maxBitRate	=	en25MBPS;
	}
	
	cinfo->ccc	=	((U16)csd[11] << 4) | (csd[10] >> 4);

	
	tmp	=	csd[10] & 0x0F;
	DBG_assert( (tmp >= 9) && (tmp <= 11) );
	DBG_assert( (cinfo->vcsd == CSD_V10) || (tmp == 9) );

	cinfo->maxBlkSize	=	1 << tmp;
	//FIXME
#if	0
	cinfo->blkSize		=	cinfo->maxBlkSize;
	if( cinfo->blkSize > SD_MAX_HOST_BLK_SIZE ) {
		cinfo->blkSize	=	CARD_BLOCK_SIZE;
	}
#else
	cinfo->blkSize	=	CARD_BLOCK_SIZE;
#endif

	cinfo->dsrImp	=	(csd[9] >> 4) & 0x01;

	if( cinfo->vcsd	 == CSD_V10 ) {
		//v10
		U32 size;
		U32	multi;

		tmp = 1 << tmp;
		
		size = (( (U32)csd[9] & 0x03) << 10) | ( (U32)csd[8] << 2) | ((U32)csd[7] >> 6);

		multi = ((csd[6] & 0x03) << 1 ) | (csd[5] >> 7);
		DBG_assert( multi < 8 );
		multi = 1 << (multi + 2);
		
		tmp *=	(size + 1) * multi;
		DBG_assert( !(tmp & (512 - 1)) );
		//FIXME 
		//cinfo->capacity		=	tmp;
		cinfo->capacity	=	tmp >> 9;			//blkcnts
	}
	else {
		//v20

		tmp = ( (U32)(csd[8] & 0x3F) << 16 ) | ((U32)csd[7] << 8 ) | csd[6];
		tmp &=	0x3FFFFF;
	//	tmp = endianSwitch32( tmp );

		cinfo->capacity	=	(tmp + 1) << 10;	//size ?
	}
	
	cinfo->wp	=	(csd[1] >> 4) & 0x03;
	DBG_assert( cinfo->wp == 0 );

	return TRUE;
}

static int sdAnalyzeSCR( U8 *scr, CARD_INFO *cinfo )
{
	cinfo->vspec	=	scr[0] & 0x07;
	DBG_assert( !cinfo->SDHC || (cinfo->vspec & SCR_VSPEC_20) );

	cinfo->buswidth	=	scr[1] & 0x0F;
	DBG_assert( (cinfo->buswidth & SCR_BUSWIDTH_1BIT)  && (cinfo->buswidth & SCR_BUSWIDTH_4BIT) );

	return TRUE;
}

static int sdAnalyzeSDstatus( U8 *sdstat, int buswidth )
{
#define	BUS_1BIT	0
#define	BUS_4BIT	2

	U8	tmp = sdstat[0] >> 6;
	if( buswidth == SD_BUSWIDTH_4BIT ) {
		DBG_assert( tmp == BUS_4BIT );
		return ( tmp == BUS_4BIT );
	}
	else {
		DBG_assert( tmp == BUS_1BIT );
		return ( tmp == BUS_1BIT );
	}	
}


static int sdmem_open( void )
{
	SD_DATA	*psd			=	&sdData;
	
	int	ret;
	U32	tmp;
	int loop;

	U32	argu;
	U32	R2[R2_DATA_SIZE];
	U32	R6;
	U32	R1;

	DBG_Printf("%s\n\r", __func__);
	delayms(10);

	DBG_assert( psd->cardState	>=	enCSTATE_READY );

	if( !sdhcd_isCardPresent() )	return FALSE;

	ret	=	hs_cmdProtocol( SD_CMD_ALL_SEND_CID, 0, R2, NULL, NULL, NULL );
	DBG_Printf("SD_CMD_ALL_SEND_CID/CMD2:%d\n\r", ret);
	delayms(2);

	DBG_assert( ret == enTRANS_OK );
	if( ret != enTRANS_OK )	return FALSE;

	psd->cardState		=	enCSTATE_IDENTIFY;


	ret	=	hs_cmdProtocol( SD_CMD_SEND_RELATIVE_ADDR, 0, &R6, NULL, NULL, NULL );
	DBG_assert( ret == enTRANS_OK );
	DBG_Printf("SD_CMD_SEND_RELATIVE_ADDR/CMD3:%d\n\r", ret);
	if( ret != enTRANS_OK )	return FALSE;
	psd->cardRegister.RCA	=	(U16)(R6 >> 16);
	delayms(2);

	psd->cardState	=	enCSTATE_STANDBY;

	argu	=	(U32)psd->cardRegister.RCA << 16;
	ret	=	hs_cmdProtocol( SD_CMD_SEND_CID, argu, R2, NULL, NULL, NULL );
	DBG_Printf("SD_CMD_SEND_CID/CMD10:%d\n\r", ret);
	DBG_assert( ret == enTRANS_OK );
	if( ret != enTRANS_OK )	return FALSE;
	memcpy( psd->cardRegister.CID, R2, R2_DATA_SIZE );
	delayms(2);

	ret	=	hs_cmdProtocol( SD_CMD_SEND_CSD, argu, R2, NULL, NULL, NULL );
	DBG_Printf("SD_CMD_SEND_CID/CMD9:%d\n\r", ret);
	DBG_assert( ret == enTRANS_OK );
	if( ret != enTRANS_OK )	return FALSE;
	memcpy( psd->cardRegister.CSD, R2, R2_DATA_SIZE );
	ret = sdAnalyzeCSD( (U8*)R2, &psd->cinfo );
	DBG_Printf("SD_CMD_SEND_CSD/CMD10:%d\n\r", ret);
	DBG_assert( ret );
	if( !ret )	return FALSE;
	delayms(2);

#if	0
	if( psd->cinfo.dsrImp ) {
		argu	=	DSR_REG_25MHZ << 16;
		ret	=	hs_cmdProtocol( SD_CMD_SET_DSR, argu, NULL, NULL, NULL, NULL );
		DBG_assert( ret == enTRANS_OK );
		if( ret != enTRANS_OK )	return FALSE;
	} 
#endif

/*
//	psd->khz	=	SD_FPP_MAX;
	psd->khz	=	SD_FPP_TYPICAL;
//	ret	=	sdhcd_setClk( psd->khz, sdif_getSysClk() );
	ret	=	sdhcd_setClk( 30, 120 );	
//	ret	=	sdhcd_setClk( 80, 60 );	
	sddbg_assert2( ret );
*/
	argu	=	(U32)psd->cardRegister.RCA << 16;
	ret	=	hs_cmdProtocol( SD_CMD_SEL_DESEL_CARD, argu, &R1, NULL, NULL, NULL );
	DBG_Printf("SD_CMD_SEL_DESEL_CARD/CMD7:%d,argu:0x%x\n\r", ret, argu);
	DBG_assert( ret == enTRANS_OK );
	if( ret != enTRANS_OK )	return FALSE;
	delayms(2);

	psd->cardState	=	enCSTATE_TRANSFER;

#define	SCR_MAX_LOOP	4
	loop = 0;
	while( loop ++ < SCR_MAX_LOOP )
	{
		tmp = SCR_REG_BYTES;
		ret	=	hs_cmdProtocol( SD_CMD_ACMD_SEND_SCR, 0, &R1, (U8*)psd->cardRegister.SCR, NULL, &tmp );
		//DBG_Printf("SD_CMD_ACMD_SEND_SCR/CMD51:%d\n\r", ret);
		DBG_assert( ret == enTRANS_OK );
		if( ret == enTRANS_OK )	break;
		DBG_assert( tmp == SCR_REG_BYTES );
		delayms(10);
	}

	if( loop >= SCR_MAX_LOOP )
	{
		return FALSE;
	}
	ret	=	sdAnalyzeSCR( (U8*)psd->cardRegister.SCR, &psd->cinfo );
	DBG_assert( ret );
	if( !ret )	return FALSE;
	delayms(2);
		
	


#define	ACDM_BUSWIDTH_1B	0	
#define	ACDM_BUSWIDTH_4B	2
#ifndef SD_BUS_1_BIT
	tmp = (psd->cinfo.buswidth & SCR_BUSWIDTH_4BIT);
	if( tmp )
	{
		DBG_Printf("SD 4-Bit\n\r");

		sdhcd_setCardInt( FALSE );

		argu	=	ACDM_BUSWIDTH_4B;
		ret	=	hs_cmdProtocol( SD_CMD_ACMD_SET_BUS_WIDTH, argu, &R1, NULL, NULL, NULL );
		//DBG_Printf("SD_CMD_ACMD_SET_BUS_WIDTH/ACMD6:%d\n\r", ret);
		sddbg_assert2( ret == enTRANS_OK );
		
		if( ret == enTRANS_OK )
		{
			psd->buswidth	=	SD_BUSWIDTH_4BIT;
			ret = sdhcd_setBusWidth( psd->buswidth );
			sddbg_assert2( ret );
		}
	}
	else
#endif
	{
		DBG_Printf("SD 1-Bit\n\r");
	}

	psd->khz	=	SD_FPP_SPEED;
	ret	=	sdhcd_setClk( psd->khz, sdif_getSysClk() );	
	sddbg_assert2( ret );

	tmp = SD_STATUS_SIZE;
	ret	=	hs_cmdProtocol( SD_CMD_ACMD_SD_STATUS, 0, &R1, psd->sdStatus, NULL, &tmp );
	DBG_Printf("SD_CMD_ACMD_SD_STATUS/ACMD13:%d\n\r", ret);
	DBG_assert( ret == enTRANS_OK );
	DBG_assert( tmp == SD_STATUS_SIZE );
	ret = sdAnalyzeSDstatus( psd->sdStatus, psd->buswidth );
	sddbg_assert2( ret );
	if( !ret )	return FALSE;
	delayms(2);

	
	//SD_CMD_SWITCH_FUNC
	//FIXME

	argu	=	psd->cinfo.blkSize;
	ret	=	hs_cmdProtocol( SD_CMD_SET_BLOCKLEN, argu, &R1, NULL, NULL, NULL );
	DBG_Printf("SD_CMD_SET_BLOCKLEN/CMD16:%d\n\r", ret);
	sddbg_assert2( ret == enTRANS_OK );
	if( ret != enTRANS_OK )	return FALSE;
	delayms(2);

		
	return TRUE;
}

static int sdmem_close( void )
{
	SD_DATA	*psd			=	&sdData;
	
	int	ret;

	U32	argu;
	U32	R1;


	if( !sdhcd_isCardPresent() ) {
		psd->cardState	=	enCSTATE_DISCONNECT;
		return TRUE;
	}

#if	1
	psd->khz	=	SD_FDO_DEFAULT;
	ret	=	sdhcd_setClk( psd->khz, sdif_getSysClk() );
	sddbg_assert( ret );
	if( ! ret )	return FALSE;
#endif

	psd->cardState	=	enCSTATE_IDLE;

	ret = hs_cmdProtocol( SD_CMD_GO_IDLE_STATE, 0, NULL, NULL, NULL, NULL);
	sddbg_assert( ret == enTRANS_OK );
	if( ret != enTRANS_OK )	return FALSE;


	return TRUE;
}

const MEM_CARD_DRIVER	sdmemDriver	=	{
	sdmem_open,
	sdmem_close,
	sdmem_readBlks,
	sdmem_writeBlks
};


//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//	MMC card
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@

static int mmc_open( void )
{
}

static int mmc_close( void )
{
}

const MEM_CARD_DRIVER mmcDriver	=	{
	0
};

//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//	SD io card
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 
static int sdio_open( void )
{
}

static int sdio_close( void )
{
}

const SDIO_CARD_DRIVER sdioDriver = {
	0
};

//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@


#define	CMD8_VHS_MASK				(0x0F << 8)
#define	CMD8_VHS_27_36V				(1 << 8)
#define	CMD8_CHK_PATTERN_MASK		0xFF
#define	CMD8_CHK_PATTERN			0xAA

#define	IO_OCR_MASK					0xFFFFFF
#define	IO_OCR_27_36V				0xFF8000

#define	R4_RDY						(1 << 31)
#define	R4_MP						(1 << 27)

#define	SD_OCR_HCS_CCS				(1 << 30)
#define	SD_OCR_RDY					(1 << 31)
#define	SD_OCR_27_36V				0xFF8000
#define	SD_OCR_30_31V				(1 << 18)

static int sdCardIdentify( U8 *cardType, U8 *sdhc, U8 *v2 )
{
	SD_DATA	*psd			=	&sdData;

	U8	io, mem;
	U8	f8 = FALSE;
	U8	hc	=	FALSE;
	
	int ret;	
	U32	tmp;
	U32	argu;
	U32	loop;
	
	U32	R7;
	U32	R4;
	U32	R3;

	TIME time0, time1;
	U32 curTime;

	io	=	mem	=	FALSE;
	*cardType	=	enCARD_UNKOWN;
	*sdhc	=	FALSE;

#define	SD_INIT_MAX_LOOPS	20
#define	SD_INIT_DELAY_MS	20	

#define	MAX_GO_IDLE_RETRY	10
	loop = 0;

//	while(1)
//		ret = hs_cmdProtocol( SD_CMD_GO_IDLE_STATE, 0, NULL, NULL, NULL, NULL);

	while( loop ++ < MAX_GO_IDLE_RETRY )
	{
		ret = hs_cmdProtocol( SD_CMD_GO_IDLE_STATE, 0, NULL, NULL, NULL, NULL);
		if( ret == enTRANS_OK )
		{
			break;
		}
	}
	DBG_assert( ret == enTRANS_OK );
	if( ret != enTRANS_OK )
	{
		return FALSE;
	}
	psd->cardState		=	enCSTATE_IDLE;

	DBG_Printf( "ID 0\n\r" );

	timer_delayms(10);

	//while (1)
	{
		argu	=	CMD8_CHK_PATTERN | CMD8_VHS_27_36V;
		R7	=	0;
		ret = hs_cmdProtocol( SD_CMD_SEND_IF_COND, argu, &R7, NULL, NULL, NULL );
		DBG_assert( (ret == enTRANS_TIMEOUT) || (ret == enTRANS_OK) || (ret == enTRANS_RESP_ERR) );
		DBG_Printf( "1 CMD8:ret=%d, argu=0x%x, R7=0x%x\n\r", ret, argu, R7);
		delayms(2);
		//delayms(100); //fro debugging
	}

	if( ret == enTRANS_TIMEOUT )
	{
		f8	=	FALSE;
	}
	else if( ret == enTRANS_OK )
	{
		if( (R7 & (CMD8_VHS_MASK | CMD8_CHK_PATTERN_MASK)) == argu )
		{
			f8	=	TRUE;
			DBG_Puts("CMD8 Resp OK\n\r");
		}
		else
		{
			DBG_assert(0);
			DBG_Puts("CMD8 Resp Err\n\r");
			return FALSE;
		}
	}
	else
	{
		DBG_assert(0);
		return FALSE;
	}

	*v2	=	FALSE;
	if( f8 )
	{
		*v2 = TRUE;
	}

	DBG_Printf( "ID 1\n\r" );
	timer_delayms(10);

	argu	=	0;	
	R4	=	0;
	ret = hs_cmdProtocol( SD_CMD_IO_SEND_OP_COND, argu, &R4, NULL, NULL, NULL);
	DBG_assert( (ret == enTRANS_TIMEOUT) || (ret == enTRANS_OK) || (ret == enTRANS_RESP_ERR) );
	DBG_Printf( "1 CMD5:ret=%d, argu=0x%x, R4=0x%x\n\r", ret, argu, R4);
	delayms(2);
	if( ret == enTRANS_TIMEOUT )
	{
		io = FALSE;
	}
	else if( ret == enTRANS_OK )
	{
		argu = R4 & IO_OCR_27_36V;
		DBG_assert( argu  );

#define	SDIO_SEND_OP_COND_MAX_TIME	1000*1000		//1s
#if 0
		timer_get( &time0, FALSE );
#else
		curTime = timer_getCurtime();
#endif
		do
		{
#if 0
			timer_get( &time1, FALSE );
			tmp = timer_calUs( &time0, &time1 );
			if( tmp >= SDIO_SEND_OP_COND_MAX_TIME )
			{
				break;
			}
#else
			tmp = FALSE;
			if (timer_checkTimeout(curTime, SDIO_SEND_OP_COND_MAX_TIME * 1000000))
			{
				tmp = TRUE;
				break;
			}
#endif

			ret = hs_cmdProtocol( SD_CMD_IO_SEND_OP_COND, argu, &R4, NULL, NULL, NULL);
			if( ret != enTRANS_OK )
			{
				break;
			}
		} while( !(R4 & R4_RDY) );
		
		DBG_Printf( "2 CMD5:ret=%d, argu=0x%x, R4=0x%x\n\r", ret, argu, R4);
		delayms(2);

		//if( tmp >= SDIO_SEND_OP_COND_MAX_TIME )
		if( tmp )
		{
			return FALSE;
		}

		DBG_Printf( "ID 2A:%d\n\r", ret );
		delayms(2);

		if( (ret == enTRANS_OK) && (R4 & R4_RDY) )
		{
			io	=	TRUE;
		}
		else
		{
			io	=	FALSE;
		}

		if( (ret == enTRANS_OK) && !(R4 & R4_MP) )
		{
			if( io )
			{
				*cardType	=	enCARD_SDIO;
				return TRUE;
			}
			else
			{
				return FALSE;
			}
		}
	}
	else
	{
		io = FALSE;
	}

	DBG_Printf( "ID 2\n\r" );
	timer_delayms(10);

	loop = 0;
	while( loop ++ < MAX_GO_IDLE_RETRY )
	{
		ret = hs_cmdProtocol( SD_CMD_GO_IDLE_STATE, 0, NULL, NULL, NULL, NULL);
		if( ret == enTRANS_OK )
		{
			break;
		}
	}
	DBG_assert( ret == enTRANS_OK );
	if( ret != enTRANS_OK )
	{
		return FALSE;
	}
	psd->cardState		=	enCSTATE_IDLE;

	if( f8 )
	{
		argu	=	CMD8_CHK_PATTERN | CMD8_VHS_27_36V;
		R7	=	0;
		ret = hs_cmdProtocol( SD_CMD_SEND_IF_COND, argu, &R7, NULL, NULL, NULL );
		DBG_assert(ret == enTRANS_OK);
		DBG_assert ( (R7 & (CMD8_VHS_MASK | CMD8_CHK_PATTERN_MASK)) == argu ) ;

		//DBG_Printf( "ID 20\n\r" );
		DBG_Printf( "2 CMD8:ret=%d, argu=0x%x, R7=0x%x\n\r", ret, argu, R7);
		timer_delayms(10);
	}

	DBG_Printf( "ID 21 \n\r" );
	timer_delayms(10);

	argu	=	0;	
//	if( f8 ) argu |= SD_OCR_HCS_CCS;
	R3	=	0;
	ret = hs_cmdProtocol( SD_CMD_ACMD_SEND_OP_COND, argu, &R3, NULL, NULL, NULL);
	DBG_Printf( "1 ACMD41:ret=%d, argu=0x%x, R3=0x%d\n\r", ret, argu, R3);
	delayms(2);
	if( ret == enTRANS_TIMEOUT )
	{
		ret = hs_cmdProtocol( SD_CMD_GO_IDLE_STATE, 0, NULL, NULL, NULL, NULL);
		DBG_assert( ret == enTRANS_OK );
		if( ret != enTRANS_OK )
		{
			DBG_Printf( "enTRANS err\n");
			return FALSE;
		}

		ret = hs_cmdProtocol( SD_CMD_MMC_SEND_OP_COND, 0, &R3, NULL, NULL, NULL);
		DBG_Printf( "2 ACMD41:ret=%d, argu=0x%x, R3=0x%d\n\r", ret, argu, R3);
		delayms(2);
		if( ret == enTRANS_TIMEOUT )
		{
			if( io )
			{
				*cardType	=	enCARD_SDIO;
				return TRUE;
			}
			else
			{
				DBG_Printf( "enTRANS timeout\n");
				return FALSE;
			}			
		}
		else if( ret == enTRANS_OK )
		{
			*cardType	=	enCARD_MMC;
			return TRUE;
		}
		else
		{
			DBG_Printf( "enTRANS response err\n");
			return FALSE;
		}
	}
	else if( ret != enTRANS_OK )
	{
		if( io )
		{
			*cardType	=	enCARD_SDIO;
			return TRUE;
		}
		else
		{
			return FALSE;
		}
	}

	if( !(R3 & SD_OCR_30_31V) )
	{
		DBG_assert(0);
		DBG_Printf( "voltage don't support\n\r");
		return FALSE;
	}

	DBG_Printf( "ID 3\n\r" );

	timer_delayms(50);
	argu	=	R3 & SD_OCR_30_31V;
	if( f8 )
	{
		//v2.0
		argu |=	SD_OCR_HCS_CCS;

		loop = 0;
		do
		{
			timer_delayms( SD_INIT_DELAY_MS * 2 );
			ret = hs_cmdProtocol( SD_CMD_ACMD_SEND_OP_COND, argu, &R3, NULL, NULL, NULL);
			if( ret != enTRANS_OK )
			{
				break;
			}
		} while( !(R3 & SD_OCR_RDY) && (loop ++ <= SD_INIT_MAX_LOOPS) );

		DBG_Printf( "3 ACMD41:ret=%d, argu=0x%x, R3=0x%x\n\r", ret, argu, R3);
		delayms(2);
	
		if( loop > SD_INIT_MAX_LOOPS )
		{
			DBG_Printf( "time out 1\n\r" );
			return FALSE;
		}

		if( (ret != enTRANS_OK) || !(R3 & SD_OCR_RDY) )
		{
			if( io )
			{
				*cardType	=	enCARD_SDIO;
				DBG_Printf( "1 SD type:SDIO\n\r" );
				return TRUE;
			}
			else
			{
				DBG_Printf( "1 SD type:No SDIO\n\r" );
				return FALSE;
			}
		}
		else
		{
			mem	=	TRUE;
			if( R3 & SD_OCR_HCS_CCS )
			{
				hc	=	TRUE;
			}
			else
			{
				hc	=	FALSE;
			}
		}
	}
	else
	{
		//legacy
		loop = 0;
		do
		{
			//timer_delayms( SD_INIT_DELAY_MS );
			//timer_delayms( SD_INIT_DELAY_MS*2 ); //for solving sd cards that cannot be read,
			timer_delayms( SD_INIT_DELAY_MS*4 ); //for solving sd cards that cannot be read,
			ret = hs_cmdProtocol( SD_CMD_ACMD_SEND_OP_COND, argu, &R3, NULL, NULL, NULL);
			if( ret != enTRANS_OK )
			{
				break;
			}
		} while( !(R3 & SD_OCR_RDY) && (loop ++ <= SD_INIT_MAX_LOOPS) );

		DBG_Printf( "4 ACMD41:ret=%d, argu=0x%x, R3=0x%x\n\r", ret, argu, R3);
		delayms(2);

		if( loop > SD_INIT_MAX_LOOPS )
		{
			DBG_Printf( "time out 2\n\r" );
			return FALSE;
		}

		if( (ret != enTRANS_OK) || !(R3 & SD_OCR_RDY) )
		{
			if( io )
			{
				*cardType	=	enCARD_SDIO;
				DBG_Printf( "2 SD type:SDIO\n\r" );
				return TRUE;
			}
			else
			{
				DBG_Printf( "2 SD type:No SDIO\n\r" );
				return FALSE;
			}
		}
		else
		{
			mem	=	TRUE;
			hc	=	FALSE;
		}
	}
	psd->cardState		=	enCSTATE_READY;

	DBG_Printf( "ID 4\n\r" );

	if( mem && io )
	{
		*cardType	=	enCARD_SDCOMBO;
		DBG_Printf( "3 SD type:SDCOMBO\n\r" );
	}
	else if( mem )
	{
		*cardType	=	enCARD_SDMEM;
		DBG_Printf( "3 SD type:SDMEM\n\r" );
	}
	else
	{
		DBG_assert(0);
	}

	if( hc )
	{
		*sdhc	=	TRUE;
	}
	
	return TRUE;
}

U16	sd_readBlocks( U8 *buf, U32 lba, U16 blkcnt )
{
	SD_DATA	*psd	=	&sdData;
	U16	tmp;
	
	DBG_assert( (psd->hostState == enHSTATE_TRANSFER) && (psd->cardState ==enCSTATE_TRANSFER ) );
	DBG_Assert( blkcnt > 0 );
	DBG_Assert( (psd->cardType == enCARD_SDMEM) || (psd->cardType == enCARD_SDCOMBO)
		|| (psd->cardType == enCARD_MMC) );
	
	switch( psd->cardType )
	{
	case enCARD_SDMEM:
	case enCARD_SDCOMBO:
		DBG_Assert( psd->sdmemDriver != NULL );
		tmp	=	psd->sdmemDriver->readBlks( buf, lba, blkcnt );
		DBG_Assert( tmp == blkcnt );
		break;
	
	case enCARD_MMC:
		DBG_Assert( psd->mmcDriver != NULL );
		tmp	=	psd->mmcDriver->readBlks( buf, lba, blkcnt );
		DBG_Assert( tmp == blkcnt );
		break;

	default:
		DBG_assert(0);
		return 0;
	}

	
	return tmp;
}

U16	sd_writeBlocks( U8 *buf, U32 lba, U16 blkcnt )
{
	SD_DATA	*psd	=	&sdData;
	U16	tmp;
	
	DBG_assert( (psd->hostState == enHSTATE_TRANSFER) && (psd->cardState ==enCSTATE_TRANSFER ) );
	DBG_Assert( blkcnt > 0 );
	DBG_Assert( (psd->cardType == enCARD_SDMEM) || (psd->cardType == enCARD_SDCOMBO)
		|| (psd->cardType == enCARD_MMC) );
	
	if( sdhcd_isCardMechWP() )	return 0;
	if( psd->cinfo.wp )	return 0;

	switch( psd->cardType ) {
	case enCARD_SDMEM:
	case enCARD_SDCOMBO:
		DBG_Assert( psd->sdmemDriver != NULL );
		tmp	=	psd->sdmemDriver->writeBlks( buf, lba, blkcnt );
		DBG_Assert( tmp == blkcnt );
		break;
	
	case enCARD_MMC:
		DBG_Assert( psd->mmcDriver != NULL );
		tmp	=	psd->mmcDriver->writeBlks( buf, lba, blkcnt );
		DBG_Assert( tmp == blkcnt );
		break;

	default:
		DBG_assert(0);
		return 0;
	}

	
	return tmp;
}


int sd_getCardInfo(SD_CARD_INFO *pinfo)
{
	SD_DATA	*psd	=	&sdData;
	
	DBG_assert(psd->hostState > enHSTATE_PNP);
	if( psd->hostState <= enHSTATE_PNP )	return FALSE;

	pinfo->cardType	=	psd->cinfo.cardType;
	pinfo->SDHC		=	psd->cinfo.SDHC;
	pinfo->capacity	=	psd->cinfo.capacity;
	pinfo->blkSize	=	psd->cinfo.blkSize;

	return TRUE;
}

int sd_isCardPresent( void )
{
	SD_DATA	*psd	=	&sdData;
	
	DBG_assert(psd->hostState >= enHSTATE_IDLE);

	return sdhcd_isCardPresent();
}

int sd_isCardWP( int *wp )
{
	SD_DATA	*psd	=	&sdData;

	if( psd->hostState < enHSTATE_PNP )	return FALSE;
	if( psd->cardState < enCSTATE_TRANSFER ) return FALSE;

	if( sdhcd_isCardMechWP() )	*wp = enWP_MECHANICAL;	
	else if( psd->cinfo.wp )	*wp = enWP_SOFT;
	else *wp = enWP_NONE;

	return TRUE;
}

int sd_clkChange( U32 sysclk )
{
	SD_DATA	*psd	=	&sdData;

	return sdhcd_setClk( psd->khz, sysclk );
}

static BOOL sdInit( int pnp );
int sd_errRecover( void )
{
	int ret;

	if( !sdhcd_isCardPresent() ) {
		return TRUE;
	}

	sdhcd_setPnP( FALSE );

	ret = sd_close();
	DBG_assert( ret );

	ret = sd_fini();
	DBG_assert( ret );

#define	RECOVERY_DELAY_TIME		(1*1000)	//ms
	timer_delayms( RECOVERY_DELAY_TIME );

	if( !sdhcd_isCardPresent() ) {
		sdhcd_setPnP( TRUE );
		sd_icallback_cardRemove();
		return TRUE;
	}

	ret = sdInit( FALSE );
	DBG_assert( ret );
	if(!ret)	{
		sdhcd_setPnP( TRUE );
		return FALSE;
	}

	if( !sdhcd_isCardPresent() ) {
		sdhcd_setPnP( TRUE );
		sd_icallback_cardRemove();
		return TRUE;
	}

	ret = sd_open();
	DBG_assert( ret );
	if(!ret)	{
		ret = sd_close();
		DBG_assert( ret );

		sdhcd_setPnP( TRUE );
		if( !sdhcd_isCardPresent() ) {
			sd_icallback_cardRemove();
			return TRUE;
		}
		else	
			return FALSE;
	}

	sdhcd_setPnP( TRUE );

	return TRUE;
}

int sd_preinit( void )
{
	return sdhcd_preinit();
}

static BOOL sdInit( int pnp )
{
	BOOL ret;

	SD_DATA	*psd			=	&sdData;
	memset( psd, 0, sizeof(SD_DATA) );

	psd->sdmemDriver	=	&sdmemDriver;
	psd->mmcDriver		=	&mmcDriver;
	psd->sdioDriver		=	&sdioDriver;
	
	psd->hostState		=	enHSTATE_IDLE;
	psd->cardState		=	enCSTATE_INACTIVE;

	psd->errRetry		=	FALSE;

//	sdhcd_init( FALSE );		//patch for bug

	ret = sdhcd_init( pnp );
	DBG_assert( ret );
	return ret;
}

BOOL sd_init( void )
{
	sd_preinit();

	return sdInit( TRUE );
}

BOOL sd_open( void )
{
#define	SD_OPEN_MAX_TRY		3

	BOOL ret;
	int i;

	SD_DATA	*psd			=	&sdData;

	DBG_Printf("sd hardware driver start\n");
	
//	ret = sdhcd_init( FALSE );
//	sddbg_assert2( ret );

	psd->hostState		=	enHSTATE_PNP;
	psd->cardState		=	enCSTATE_INACTIVE;

	psd->khz		=	SD_FDO_DEFAULT;
	psd->buswidth	=	SD_BUSWIDTH_1BIT;

	timer_delayms(100);
	ret = sdhcd_open( psd->khz, sdif_getSysClk(), psd->buswidth );
	if( !sdhcd_isCardPresent() )	return FALSE;
	if( !ret ) {
		sddbg_assert2(0);
		DBG_Printf( "sdhcd open fail\n\r");
		return FALSE;
	}
	DBG_Printf( "sdhcd open OK\n\r");

	timer_delayms(20);


	sdhcd_setTransMode( enTM_PIO );

	psd->errRetry		=	TRUE;
	ret	=	sdCardIdentify( &psd->cinfo.cardType, &psd->cinfo.SDHC, &psd->cinfo.v2 );
	if( !ret ) {
		sddbg_assert2(0);
		DBG_Printf( "sd identify fail\n\r");
		return FALSE;
	}

	if( !sdhcd_isCardPresent() ) {
		psd->hostState		=	enHSTATE_IDLE;
		psd->cardState		=	enCSTATE_INACTIVE;
		return FALSE;
	}

	psd->cardType	=	psd->cinfo.cardType;
	DBG_assert( psd->cardType != enCARD_UNKOWN);
 	psd->errRetry		=	TRUE;

	DBG_Printf( "sd identify OK, sd->cardType:%d\n\r", psd->cardType);
	delayms(10);

	switch( psd->cardType )
	{
	case enCARD_SDMEM:
	case enCARD_SDCOMBO:
		DBG_Puts( "sdcardType:SDMEM&SDCOMBO\n\r");
		ret	=	psd->sdmemDriver->open();
		break;

	case enCARD_SDIO:
		DBG_Puts( "sdcardType:SDIO\n\r");
		ret	=	psd->sdioDriver->open();
		break;

	case enCARD_MMC:
		DBG_Puts( "sdcardType:MMC\n\r");
		ret	=	psd->mmcDriver->open();
		break;

	default:
		DBG_assert(0);
	}
	sddbg_assert2( ret );

	if( ret ) {
		DBG_Printf( "sd open OK\n\r");

		psd->hostState		=	enHSTATE_TRANSFER;
		psd->cardState		=	enCSTATE_TRANSFER;
	}
	else {
		DBG_Printf( "sd open fail\n\r");
	}

	sdhcd_setTransMode( SD_PIO_MODE );		//enTM_PIO

	return ret;
}

BOOL sd_close( void )
{
	BOOL ret;

	SD_DATA	*psd			=	&sdData;

	switch( psd->cardType )
	{
	case enCARD_SDMEM:
	case enCARD_SDCOMBO:
		ret	=	psd->sdmemDriver->close();
		break;
	case enCARD_SDIO:
		ret	=	psd->sdioDriver->close();
		break;
	case enCARD_MMC:
		ret	=	psd->mmcDriver->close();
		break;
	default:
		DBG_assert(0);
	}
	DBG_assert( ret );
	if( !ret )	return FALSE;


	memset( psd, 0, sizeof(SD_DATA) );
	psd->sdmemDriver	=	&sdmemDriver;
	psd->mmcDriver		=	&mmcDriver;
	psd->sdioDriver		=	&sdioDriver;
	psd->hostState		=	enHSTATE_IDLE;
	psd->cardState		=	enCSTATE_INACTIVE;


	ret = sdhcd_close();
	DBG_assert( ret );
	return ret;
}


BOOL sd_fini( void )
{
	BOOL ret;
	SD_DATA	*psd			=	&sdData;

	psd->hostState		=	enHSTATE_STANDBY;
	psd->cardState		=	enCSTATE_INACTIVE;

	ret = sdhcd_fini();
	DBG_assert( ret );
	return ret;
}

#endif