hw_timer.c
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#include "os_config.h"
#include "c_def.h"
#include "debug.h"
//#include "oem.h"
#include "regmap.h"
#include "mem_reloc.h"
#include "hw_timer.h"
#include "hw_pll.h"
//void timer_delayus(U32 xus) __INTERNAL_RAM_TEXT;
//void timer_delayms(U32 xms) __INTERNAL_RAM_TEXT;
//U8 timer_checkTimeout(U32 StartTime, U32 xus) __INTERNAL_RAM_TEXT;
//U32 timer_getCurtime(void) __INTERNAL_RAM_TEXT;
#if 1
#define CLOCKS_PER_MS ( SYSTEM_CLKS / 1000 )
#else
#define CLOCKS_PER_MS ( SystemClock / 1000 )
#endif
#define CLOCKS_PER_US ( CLOCKS_PER_MS / 1000 )
//#define TIMER_INTERVAL_MS(x) ( (x) * CLOCKS_PER_MS )
//#define TIMER0_INTERVAL TIMER_INTERVAL_MS(OS_MSEC_PER_TICK)
//#define TIMER1_TICK_MS 1
//#define TIMER1_INTERVAL TIMER_INTERVAL_MS(TIMER1_TICK_MS)
#define TIMER_DELAY_MAX_US 1000
#define TIMER_DELAY_MAX_MS 1000
#define TIMER0_INT_MASK (1 << XCHAL_TIMER0_INTERRUPT)
#define TIMER1_INT_MASK (1 << XCHAL_TIMER1_INTERRUPT)
#define TIMER2_INT_MASK (1 << XCHAL_TIMER2_INTERRUPT)
/*
#define TIMER0_INTERVAL 0x00008000
#define TIMER1_INTERVAL 0x00008000
#define TIMER2_INTERVAL 0x000186A0
*/
void timer_delayus(U32 xus)
{
U32 StartTime;
U32 CurTime;
U32 EndTime;
U8 bTimeOut;
StartTime = read_ccount();
EndTime = StartTime + (xus*CLOCKS_PER_US);
while (1)
{
CurTime = read_ccount();
if (StartTime <= EndTime)
{
bTimeOut = ((CurTime >= StartTime) && (CurTime < EndTime))? FALSE : TRUE;
if (bTimeOut)
{
break;
}
}
else
{
bTimeOut = ((CurTime >= StartTime) || (CurTime < EndTime))? FALSE : TRUE;
if (bTimeOut)
{
break;
}
}
}
}
void timer_delayms(U32 xms)
{
U32 i;
for (i=0; i<xms; i++)
{
timer_delayus(1000);
//watchdog_time_reset();
}
}
U8 timer_checkTimeout(U32 StartTime, U32 xus)
{
U32 CurTime;
U32 EndTime;
U8 bTimeOut;
//uSecod
CurTime = read_ccount();
EndTime = StartTime + (xus*CLOCKS_PER_US);
if ( StartTime <= EndTime)
{
bTimeOut = ((CurTime >= StartTime) && (CurTime < EndTime))? FALSE : TRUE;
}
else
{
bTimeOut = ((CurTime >= StartTime) || (CurTime < EndTime))? FALSE : TRUE;
}
return bTimeOut;
}
U32 timer_getCurtime(void)
{
return read_ccount();
}
U32 timer_read_reg(void)
{
return read_ccount();
}
#if 0
void timer_get( TIME *time, int hiPrecise )
{
#if 0
#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
// OS_CPU_SR cpu_sr;
#endif
TX_INTERRUPT_SAVE_AREA
if( hiPrecise ) {
TX_DISABLE
}
time->sysCnt = read_ccount();
time->sysCmp = read_ccompare0();
time->sysTick = tx_time_get();
if( hiPrecise ) {
TX_RESTORE
}
/*
if( hiPrecise ) OS_ENTER_CRITICAL();
time->sysCnt = read_ccount();
time->sysCmp = read_ccompare0();
time->sysTick = system_ticks;
if( hiPrecise ) OS_EXIT_CRITICAL();
*/
#endif
}
U32 timer_calUs( TIME *start, TIME *stop )
{
#if 0
U32 us = stop->sysTick - start->sysTick;
U32 cnt1 = start->sysCnt - (start->sysCmp - TIMER0_INTERVAL);
U32 cnt2 = stop->sysCnt - (stop->sysCmp - TIMER0_INTERVAL);
// U32 cnt1 = start->sysCnt - start->sysCmp;
// U32 cnt2 = stop->sysCnt - stop->sysCmp;
DBG_Assert( stop->sysTick >= start->sysTick );
DBG_Assert( (stop->sysTick > start->sysTick) || (stop->sysCnt > start->sysCnt ) );
while ( us && (cnt2 < cnt1) ) {
DBG_Assert( us > 0 );
--us;
cnt2 += TIMER0_INTERVAL;
}
us *= OS_MSEC_PER_TICK * 1000;
us += (cnt2 - cnt1 + CLOCKS_PER_US/2 ) / CLOCKS_PER_US;
// us += ((cnt2 - cnt1) % TIMER0_INTERVAL) /CLOCKS_PER_US ;
return us;
#endif
}
#endif