memmap.xmm 4.39 KB
//  Memory map file to generate linker scripts for an LSP without any default runtime.

// $Id: //depot/rel/BadgerPass/Xtensa/SWConfig/ldscripts/nort.parm#1 $

// Customer ID=4869; Build=0x172b4; Copyright (c) 2004-2006 by Tensilica Inc.  ALL RIGHTS RESERVED.
// These coded instructions, statements, and computer programs are the
// copyrighted works and confidential proprietary information of Tensilica Inc.
// They may not be modified, copied, reproduced, distributed, or disclosed to
// third parties in any manner, medium, or form, in whole or in part, without
// the prior written consent of Tensilica Inc.

//  Show more details if configuration targets the XT2000 board:
INCLUDE_XT2000_MEMORIES = try


// A memory map is a sequence of memory descriptions and
// optional parameter assignments.
//
// Each memory description has the following format:
//   BEGIN <name>
//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
//                       : [writable] [,executable] [,device] ;
//     <segment>*
//   END <name>
//
// where each <segment> description has the following format:
//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
//                : <section-name>* ;
//
// Each parameter assignment is a keyword/value pair in the following format:
//   <keyword> = <value>                (no spaces in <value>)
// or
//   <keyword> = "<value>"              (spaces allowed in <value>)
//
// The following primitive is also defined:
//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
//                                       | IN_SEGMENT(<seg-name>) }
//
// Please refer to the Xtensa LSP Reference Manual for more details.
//

BEGIN dram1
0x3ffc0000: dataRam : dram1 : 0x20000  : writable ;
 dram1_0 : C : 0x3ffc0000 - 0x3ffdffff : .dram1.rodata .dram1.literal .dram1.data .dram1.bss;
END dram1

BEGIN dram0
0x3ffe0000: dataRam : dram0 : 0x20000  : writable ;
 dram0_0 : C : 0x3ffe0000 - 0x3fffffff : .dram0.rodata .iram0.literal .dram0.literal .dram0.data .dram0.bss;
END dram0

BEGIN iram0
0x40000000: instRam : iram0 : 0x20000  : executable, writable ;
 iram0_0 : C : 0x40000000 - 0x4001ffff : .iram0.text;
END iram0

BEGIN srom
0x50000000: sysrom : srom : 0x1000000  : executable ;
 ResetVector.text : F : 0x50000000 - 0x500002ff : .ResetVector.text;
 srom0 : C : 0x50000300 - 0x50ffffff : .srom.rodata .srom.literal .srom.text .rom.store;
END srom

BEGIN sram
0x60000000: sysram : sram : 0x10000000  : executable, writable ;
 WindowVectors.text : F : 0x60000000 - 0x60000177 : .WindowVectors.text;
 sram1 : C : 0x60000178 - 0x6000017f : .Level2InterruptVector.literal;
 Level2InterruptVector.text : F : 0x60000180 - 0x600001b7 : .Level2InterruptVector.text;
 sram3 : C : 0x600001b8 - 0x600001bf : .Level3InterruptVector.literal;
 Level3InterruptVector.text : F : 0x600001c0 - 0x600001f7 : .Level3InterruptVector.text;
 sram5 : C : 0x600001f8 - 0x600001ff : .Level4InterruptVector.literal;
 Level4InterruptVector.text : F : 0x60000200 - 0x60000237 : .Level4InterruptVector.text;
 sram7 : C : 0x60000238 - 0x6000023f : .Level5InterruptVector.literal;
 Level5InterruptVector.text : F : 0x60000240 - 0x60000277 : .Level5InterruptVector.text;
 sram9 : C : 0x60000278 - 0x6000027f : .DebugExceptionVector.literal;
 DebugExceptionVector.text : F : 0x60000280 - 0x600002b7 : .DebugExceptionVector.text;
 sram11 : C : 0x600002b8 - 0x600002bf : .NMIExceptionVector.literal;
 NMIExceptionVector.text : F : 0x600002c0 - 0x600002f7 : .NMIExceptionVector.text;
 sram13 : C : 0x600002f8 - 0x600002ff : .KernelExceptionVector.literal;
 KernelExceptionVector.text : F : 0x60000300 - 0x60000337 : .KernelExceptionVector.text;
 sram15 : C : 0x60000338 - 0x6000033f : .UserExceptionVector.literal;
 UserExceptionVector.text : F : 0x60000340 - 0x60000377 : .UserExceptionVector.text;
 sram17 : C : 0x60000378 - 0x600003bf : .DoubleExceptionVector.literal;
 DoubleExceptionVector.text : F : 0x600003c0 - 0x600003ff : .DoubleExceptionVector.text;
 sram18 : C : 0x60000400 - 0x6fffffff :  STACK :  HEAP : .sram.rodata .rodata .lit4 .sram.literal .literal .ResetVector.literal .sram.text .text .sram.data .data .sram.bss .bss;
END sram

BEGIN iocached
0x70000000: io : iocached : 0xe000000  : executable, writable ;
END iocached

BEGIN rambypass
0x80000000: sysram : rambypass : 0x10000000  : device, executable, writable ;
END rambypass

BEGIN iobypass
0x90000000: io : iobypass : 0xe000000  : device, executable, writable ;
END iobypass