/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
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*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
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*
*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
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*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
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*****************************************************************************/

/*******************************************************************************
 *
 * Filename:
 * ---------
 * MT6250FM.h
 *
 * Project:
 * --------
 *   MAUI
 *
 * Description:
 * ------------
 *
 *      MT6250 Register
 *
 * Author:
 * -------
 * -------
 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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 *============================================================================
 *******************************************************************************/
#ifndef __MT6250FM_H__
#define __MT6250FM_H__
  
//#include "kal_general_types.h"

/* General propose constant */
#define ACFG_CLK_CON0 (*((volatile unsigned int*)0xA0730020))
#define FM_AFE_ABBSYS (*((volatile unsigned int*)0xA0010230))
#define FM_D_DIE_ABBSYS (*((volatile unsigned int*)0xA0160020))
#define FM_A_DIE_ABBSYS (*((volatile unsigned int*)0xA0720020))

#define FM_FSPI_26M_CLK_ENABLE()\
			do{ACFG_CLK_CON0=0x0000;}while(0)
#define FM_FSPI_26M_CLK_DISABLE()\
			do{ACFG_CLK_CON0=0x0013;}while(0)
#define FM_ADPLL_CLK_CON0 (*((volatile unsigned int*)0xA0010108))
#define FM_ADPLL_CLK_ENABLE_BIT (0x4000)
#define FM_ADPLL_CLK_ENABLE()\
			do{FM_ADPLL_CLK_CON0 |= FM_ADPLL_CLK_ENABLE_BIT;}while(0)
#define FM_ADPLL_CLK_DISABLE()\
			do{FM_ADPLL_CLK_CON0 &= ~FM_ADPLL_CLK_ENABLE_BIT;}while(0)
#define FM_AFE_ABBSYS_ENABLE() \
			do{FM_AFE_ABBSYS |= 0x0001;}while(0)
#define FM_AFE_ABBSYS_DISABLE() \
			do{FM_AFE_ABBSYS &= (~0x0001);}while(0)
#define FM_D_DIE_ABBSYS_ENABLE() \
			do{FM_D_DIE_ABBSYS |= 0x0080;}while(0)
#define FM_A_DIE_ABBSYS_ENABLE() \
			do{FM_A_DIE_ABBSYS |= 0x0008;}while(0)
#define FM_D_DIE_ABBSYS_DISABLE() \
			do{FM_D_DIE_ABBSYS &= (~0x0080);}while(0)
#define FM_A_DIE_ABBSYS_DISABLE() \
			do{FM_A_DIE_ABBSYS &= (~0x0008);}while(0)
				
#if defined(MT6250FM)				
#define FSPI_MAS_ADDR_REG 0xA0770004
#define FSPI_MAS_CFG2_REG 0xA0770014
#define FSPI_MAS_CTRL_REG 0xA0770000
#define FSPI_MAS_RDDATA_REG 0xA077000C
#define FSPI_MAS_WRDATA_REG 0xA0770008
#define FSPI_MAS_RRCCAL_REG 0xA0770050
#elif (defined(MT6260FM) || defined(MT6261FM))
#define FSPI_MAS_ADDR_REG 0xA0260004
#define FSPI_MAS_CFG2_REG 0xA0260014
#define FSPI_MAS_CTRL_REG 0xA0260000
#define FSPI_MAS_RDDATA_REG 0xA026000C
#define FSPI_MAS_WRDATA_REG 0xA0260008
#define FSPI_MAS_RRCCAL_REG 0xA0260050
#endif

#define RCAL_NOBIAS 0x000F
#define RCAL_VALID 0x0010
#define RCCAL_NOBIAS 0x03E0
#define RCCAL_VALID 0x0400

#define FM_EN_CTRL 0x60
#define FM_CG_CTRL_HOST 0x61
#define FM_JAMMER_SCAN 0x2000

#define SHORT_ANTENNA 0x0010 	

#define FM_MAIN_CTRL 0x63 
#define TUNE 0x0001 
#define SEEK 0x0002 
#define SCAN 0x0004 
#define SCAN_INFO 0x0008 
#define MUTE 0x0020
#define RAMP_DOWN 0x0100 
#define RDS_MASK 0x0010 	

#define FM_CHANNEL_SET 0x65		

#define FM_MAIN_CFG1 0x66 
#define FM_MAIN_CFG2 0x67 

#define FM_MAIN_INTR 0x69 
#define FM_INTR_STC_DONE 0x0001	
#define FM_INTR_RDS 0x0020	

#define FM_INTE_MASK 0x6A	
#define FM_RDS_MASK 0x20	

#define FM_RSSI 0x6C	
#define FM_STEREO 0x1000	

#define FM_RESET_FMSYS 0x6E

#define FM_STAT1 0x6F 
#define CUR_RF_CHAN 0x3FF0 
#define SHIFT_READCHAN 4 

#define FM_I2S_CON0 0x9B

#define FM_PAMD_REG	0xB4 
#define FM_PR_REG	0xB5
#define FM_FPAMD_REG	0xBC
#define FM_MR_REG	0xBD
#define FM_ATDC_REG	0x83 
#define FM_PRX_REG	0x84 
#define FM_ATDEV_REG	0x85 
#if (defined(MT6260FM) || defined(MT6261FM))
#define FM_SMG_REG	0x86 
#define FM_DELTARSSI_REG	0x88
#endif


/*#define FM_MAIN_CG1_CTRL 0x60 

#define FM_MAIN_CG2_CTRL 0x61 
    #define ANTENNA_TYPE 0x0010     
#define FM_MAIN_CTRL		0x63 
	#define TUNE 0x0001	
	#define SEEK 0x0002 
	#define SCAN 0x0004 
	#define RAMP_DOWN 0x0100 
	#define RDS_MASK 0x0010 	
#define FM_EN1	0x64 
	#define	  RAMPDOWN_COMPLETE 0x0010 
    #define   TUNE_COMPLETE 0x0008 
    #define   SEEK_COMPLETE 0x0004 
    #define   SCAN_COMPLETE 0x0002 
    #define   DSP_INIT_COMPLETE 0x0001 
#define FM_CHANNEL_SET	0x65		
	#define   HOST_CHAN	0x3FF0		
#define FM_MAIN_CFG1		0x66 
    #define   FM_CFG1_SEEK_DIR 0x0400 
	#define   FM_CFG1_CHN_STEPSIZE 0x7000 
#define FM_MAIN_CFG2		0x67 
#define FM_MAIN_INTR		0x69 
	#define FM_INTR_STC_DONE	0x0001	
    #define FM_INTR_RSSI_INTR	0x0008	
	#define   FM_INTR_SW_INTR	0x0010	
	#define   FM_INTR_RDS		0x0020  
#define FM_MAIN_MASK		0x6A	
#define FM_MAIN_EXTINTRMASK		0x6B	
	#define EXT_STC_DONE_MASK 0x01	
	#define EXT_RDS_MASK 0x20	
#define FM_R_RSSI			0x6C	
    #define FM_BF_STEREO			0x1000	
    #define FM_BF_RSSI			0x03FF		
#define FM_STAT1			0x6F 
	#define   CUR_RF_CHAN 0x3FF0 

#define ADDR_PAMD		0xB4 

#define MASK_READCHAN 0x3FF0 // mt6626 checked
#define SHIFT_READCHAN 4 
#define MASK_RSSI 		0x3FF 
*/


/*RDS Register */
#define FM_RDS_CFG0 0x80  
#define RDS_START_TH 0x000F
#define RDS_BLOCK_CNT_RESET 0x0100

#define FM_RDS_INFO_RDATA 0x81        
#define RDS_CRC_INFO 0x0001	
#define RDS_CRC_CORR_CNT 0x001E	
#define RDS_CRC_BLK_ADJ 0x0020	

#define FM_RDS_RDATA 0x82 /*channel bitmap, RDS data share this register*/    

#define FM_RDS_FIFO_STATUS0 0x87        
#define FIFO_INPUT_POINTER 0x3F00
#define RDS_BLOCK_FIFO_DIFF 0x007F
#define RDS_GROUP_FIFO_DIFF 0x007C	

#define FM_RDS_GOODBK_CNT 0x83        
#define FM_RDS_BADBK_CNT 0x84        
#define FM_RDS_PWDI 0x85        
#define FM_RDS_PWDQ 0x86        

#define FM_RDS_FIFO_STATE1 0xF0
#define FIFO_OUTPUT_NUM 0x003F
/*#define RDS_CFG0                    0x80        
	#define RDS_BUF_START_TH            0x000F  
	#define RDS_BCNT_RST                0x0100  
#define RDS_INFO_REG                0x81        
	#define RDS_CRC_BLK_ADJ             0x0020  
    #define RDS_CRC_CORR_CNT            0x001E  
	#define RDS_CRC_INFO                0x0001  
#define RDS_DATA_REG                0x82        
#define RDS_GOODBK_CNT              0x83        
#define RDS_BADBK_CNT               0x84        
#define RDS_PWDI                    0x85        
#define RDS_PWDQ                    0x86        
#define RDS_FIFO_STATUS0            0x87        
    #define RDS_FIFO_DIFF               0x007F  
    #define RDS_GROUP_DIFF_OFS          0x007C  

#define RDS_POINTER                 0xF0

	#define   RDS_GDBK_IND_A	0x0008	
	#define   RDS_GDBK_IND_B	0x0004	
	#define   RDS_GDBK_IND_C	0x0002	
	#define   RDS_GDBK_IND_D	0x0001	
	#define   OSTWD_E                    0x0010
	#define   RDS_DCO_FIFO_OFST		0x01F0      


#define RDS_BDGRP_ABD_CTRL_REG		0xB6
	#define BDGRP_ABD_EN 0x0001
	#define BER_RUN 0x2000
#define FM_DAC_CON1 0x83
#define FM_DAC_CON2 0x84

#define FM_FT_CON0 0x86
       #define FT_EN		0x0001
#define FM_FT_CON9 0x8F
	   
#define FM_I2S_CON0 0x90
       #define I2S_SRC		0x0008
	#define WLEN		0x0004
	#define FORMAT          0x0002
	#define I2S_EN		0x0001
*/
/*FSPI Command*/
#if 0//(defined(MT6626))
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
#endif
typedef enum{
    wrong_assign = 0,
//    rom_download,
    patch_download,
    coefficient_download,
//    hw_coefficient_download
}Download_type;

static void MT6250FM_ParameterDownloadToDsp(const kal_uint16 *dsp_array, Download_type type);
kal_bool MT6250FM_ReadWord(kal_uint8 CW, kal_uint16 * data);
kal_bool MT6250FM_WriteWord(kal_uint8 CW, kal_uint16 data);
static void FMDrv_FSPI_Digital_Reset(void);
void Delayus(kal_uint32 u4MicroSec);

#endif