/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. 
*
*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*****************************************************************************/

/*******************************************************************************
 * Filename:
 * ---------
 * nvram_data_items.h
 *
 * Project:
 * --------
 *   Maui
 *
 * Description:
 * ------------
 *    This file defines logical data items stored in NVRAM. 
 *    These logical data items are used in object code of Protocol Stack software.
 *
 *    As for customizable logical data items, they are defined in nvram_user_defs.h
 *
 * Author:
 * -------
 * -------
 * -------
 *
 *==============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 * removed!
 * removed!
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 *------------------------------------------------------------------------------
 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *==============================================================================
 *******************************************************************************/

#ifndef NVRAM_DATA_ITEMS_H
#define NVRAM_DATA_ITEMS_H

#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */ 

#include "kal_general_types.h"
#include "nvram_defs.h"

#include "ex_item.h"
#include "stack_config.h"   /* END_OF_MOD_ID */
#include "stack_buff_pool.h"
#include "ctrl_buff_pool.h"
#include "sysconf_statistics.h"
#if(defined(ISP_SUPPORT))
#include "drv_sw_features_isp.h"
#include "isp_nvram.h"
#endif

#if defined(__MA_L1__)
/* under construction !*/
#endif  /* __MA_L1__ */
#include "stack_msgs.h"    /* LAST_SAP_CODE */
#include "tst.h"

#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
/* under construction !*/
/* under construction !*/
#endif

#ifdef __GAIN_TABLE_SUPPORT__
#include "gain_table.h"
#endif /* __GAIN_TABLE_SUPPORT__ */

#include "med_struct.h"

#ifdef __AST_TL1_TDD__ 
#include "tl1cal_ast.h"
#endif

#ifdef __MULTI_LEVEL_BACKLIGHT_SUPPORT__
#include "custom_hw_default.h"
#endif

//#include "drv_features.h"   
#include "drv_features_adc.h"
#include "drv_features_rtc.h"
#include "drv_features_sim.h"

#include "custom_nvram_sec.h"           /* nvram_sml_context_struct */
#include "dcl.h"                        /* port_setting_struct */

#include "global_def.h"

#define NVRAM_DUAL_RECORD MAX_SIM_NUM
#define NVRAM_LID_GRP_INTERNAL(x)           (0x0000 | (0x00FF & x))
#define NVRAM_LID_GRP_FACTORY(x)            (0x0100 | (0x00FF & x))
#define NVRAM_LID_GRP_CORE(x)               (0x0200 | (0x00FF & x))
#define NVRAM_LID_GRP_COMM_APP(x)           (0x0300 | (0x00FF & x))

#define NVRAM_GRP_START                     0x04

#define NVRAM_LID_GRP_UL1(x)                (0x0400 | (0x00FF & x))
#define NVRAM_LID_GRP_CAMERA(x)             (0x0500 | (0x00FF & x))
#define NVRAM_LID_GRP_AUDIO(x)              (0x0600 | (0x00FF & x))
#define NVRAM_LID_GRP_GPS(x)                (0x0700 | (0x00FF & x))
#define NVRAM_LID_GRP_USERPROFILE(x)        (0x0800 | (0x00FF & x))
#define NVRAM_LID_GRP_OPERATORHS(x)         (0x0900 | (0x00FF & x))
#define NVRAM_LID_GRP_ADC(x)                (0x0A00 | (0x00FF & x))
#define NVRAM_LID_GRP_TOUCHPANEL(x)         (0x0B00 | (0x00FF & x))

//#define NVRAM_GRP_END                       0x09
#define NVRAM_LID_GRP_CUST(x)               (0xFF00 | (0x00FF & x))

/*
         current     keep     enum value scope	   start LID	               	
======================================================================================
2G       22          30         15 ~ 44            NVRAM_EF_L1_START
3G       21          21         45 ~ 65	           NVRAM_EF_UL1_START
ADC       1           1         66                 NVRAM_EF_ADC_LID
WIFI      7           7         67 ~ 73            NVRAM_EF_WNDRV_START
BT        8          11         74 ~ 84            NVRAM_EF_BTRADIO_RFMD3500_LID
TD       12          12         85 ~ 96            NVRAM_EF_AST_TL1_START
Other                              ~ 120           Reserver for calibration data in the future

*/
/** 
 * Step 1: (See comment of nvram_data_item.c for detail).
 * Vendor defined logical data item ID's. 
 * These logical data items are used in object code of Protocol Stack software.
 *
 */

    typedef enum
    {
        /* System record, keep the system version */
        NVRAM_EF_SYS_LID,
        /* Branch record, keep the branch version */
        NVRAM_EF_BRANCH_VERNO_LID,
        /* Flavor record, keep the flavor version */
        NVRAM_EF_FLAVOR_VERNO_LID,
        /* CustPack record, keep the custpack version */
        NVRAM_EF_CUSTPACK_VERNO_LID,
        /* SecuPack record, keep the secupack version */
        NVRAM_EF_SECUPACK_VERNO_LID,
        /* Security setting in NVRAM */
        NVRAM_EF_NVRAM_CONFIG_LID,

        NVRAM_EF_START,
        NVRAM_EF_SYS_EXCEPTION_LID = NVRAM_EF_START,
        NVRAM_EF_SYS_STATISTICS_LID,
//stupid-prevant
        NVRAM_EF_IMPT_COUNTER_LID,       //9   
        NVRAM_EF_CAT_TIMESTAMP_LID, 


    /********************************************
     *
     *  Calibration Data
     *
     **********************************************/

        NVRAM_EF_L1_START = 15,
        NVRAM_EF_L1_AGCPATHLOSS_LID = NVRAM_EF_L1_START,
        NVRAM_EF_L1_RAMPTABLE_GSM850_LID,
        NVRAM_EF_L1_RAMPTABLE_GSM900_LID,
        NVRAM_EF_L1_RAMPTABLE_DCS1800_LID,
        NVRAM_EF_L1_RAMPTABLE_PCS1900_LID,
        NVRAM_EF_L1_EPSK_START,
        NVRAM_EF_L1_EPSK_RAMPTABLE_GSM850_LID = NVRAM_EF_L1_EPSK_START,
        NVRAM_EF_L1_EPSK_RAMPTABLE_GSM900_LID,
        NVRAM_EF_L1_EPSK_RAMPTABLE_DCS1800_LID,
        NVRAM_EF_L1_EPSK_RAMPTABLE_PCS1900_LID,
        NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_GSM850_LID,
        NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_GSM900_LID,
        NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_DCS1800_LID,
        NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_PCS1900_LID,
        NVRAM_EF_L1_EPSK_END = NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_PCS1900_LID,
        NVRAM_EF_L1_AFCDATA_LID,
        NVRAM_EF_L1_TXIQ_LID,
        NVRAM_EF_L1_RFSPECIALCOEF_LID,
        NVRAM_EF_L1_INTERSLOT_RAMP_GSM850_LID,
        NVRAM_EF_L1_INTERSLOT_RAMP_GSM900_LID,
        NVRAM_EF_L1_INTERSLOT_RAMP_DCS1800_LID,
        NVRAM_EF_L1_INTERSLOT_RAMP_PCS1900_LID,
        NVRAM_EF_L1_CRYSTAL_AFCDATA_LID,
        NVRAM_EF_L1_CRYSTAL_CAPDATA_LID,
        /*Chuwei: for TX power rollback*/
        NVRAM_EF_L1_GMSK_TX_POWER_ROLLBACK_TABLE_LID,
        NVRAM_EF_L1_EPSK_TX_POWER_ROLLBACK_TABLE_LID,
        /*for TX power control*/
        NVRAM_EF_L1_GMSK_TXPC_LID,
        NVRAM_EF_L1_EPSK_TXPC_LID,
        /*for LNA Middle/Low mode*/
        NVRAM_EF_L1_LNAPATHLOSS_LID,
        /*for Temperature ADC*/
        NVRAM_EF_L1_TEMPERATURE_ADC_LID,
        /*for DCXO LPM Cload freq. offset*/
        NVRAM_EF_L1_CLOAD_FREQ_OFFSET_LID,
        NVRAM_EF_L1_END =  NVRAM_EF_L1_CLOAD_FREQ_OFFSET_LID,
        NVRAM_EF_UL1_START = 45,
        NVRAM_EF_UL1_TEMP_DAC_LID = NVRAM_EF_UL1_START,
        NVRAM_EF_UL1_PATHLOSS_BAND1_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND2_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND3_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND4_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND5_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND6_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND7_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND8_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND9_LID,
        NVRAM_EF_UL1_PATHLOSS_BAND10_LID,
        NVRAM_EF_UL1_TXDAC_BAND1_LID,
        NVRAM_EF_UL1_TXDAC_BAND2_LID,
        NVRAM_EF_UL1_TXDAC_BAND3_LID,
        NVRAM_EF_UL1_TXDAC_BAND4_LID,
        NVRAM_EF_UL1_TXDAC_BAND5_LID,
        NVRAM_EF_UL1_TXDAC_BAND6_LID,
        NVRAM_EF_UL1_TXDAC_BAND7_LID,
        NVRAM_EF_UL1_TXDAC_BAND8_LID,
        NVRAM_EF_UL1_TXDAC_BAND9_LID,
        NVRAM_EF_UL1_TXDAC_BAND10_LID,
        NVRAM_EF_UL1_END = NVRAM_EF_UL1_TXDAC_BAND10_LID,
        NVRAM_EF_WNDRV_START = 67,
        NVRAM_EF_WNDRV_MAC_ADDRESS_LID = NVRAM_EF_WNDRV_START,
        NVRAM_EF_WNDRV_TX_POWER_2400M_LID,
        NVRAM_EF_WNDRV_TX_POWER_5000M_LID,
        NVRAM_EF_WNDRV_DAC_DC_OFFSET_LID,
        NVRAM_EF_WNDRV_TX_ALC_POWER_LID,
        NVRAM_EF_WNDRV_EXT_SETTING_TRIMVAL_THERMOVAL_LID,
        NVRAM_EF_WNDRV_ALC_SLOPE_LID,
        NVRAM_EF_WNDRV_END = NVRAM_EF_WNDRV_ALC_SLOPE_LID,

        // BT
        NVRAM_EF_BTRADIO_RFMD3500_LID = 74,   /* __BT_SUPPORT__,BTMTK */
        NVRAM_EF_BTRADIO_MT6601_LID,     /* __BT_SUPPORT__,BTMTK_MT6601 */
        NVRAM_EF_BTRADIO_MT6611_LID,     /* __BT_SUPPORT__,BTMTK_MT6611 */
        //NVRAM_EF_BTRADIO_MT6612_LID,     /* __BT_SUPPORT__,BTMTK_MT6612 */
        //NVRAM_EF_BTRADIO_MT6616_LID,     /* __BT_SUPPORT__,BTMTK_MT6616 */
        //NVRAM_EF_BTRADIO_MT6236_LID,     /* __BT_SUPPORT__,BTMTK_MT6236 */
        //NVRAM_EF_BTRADIO_MT6256_LID,     /* __BT_SUPPORT__,BTMTK_MT6256 */
        //NVRAM_EF_BTRADIO_MT6276_LID,     /* __BT_SUPPORT__,BTMTK_MT6276 */
        NVRAM_EF_BTRADIO_MTK_BT_CHIP_LID = 79,     /* __BT_SUPPORT__,BTMTK_MT6622,BTMTK_MT6626 */

        // TD :wrap with compile option: __AST_TL1_TDD__ 
        NVRAM_EF_AST_TL1_START = 85,       
        NVRAM_EF_AST_TL1_TEMP_DAC_LID = NVRAM_EF_AST_TL1_START,
        NVRAM_EF_AST_TL1_AFC_DATA_LID,
        NVRAM_EF_AST_TL1_PATHLOSS_BAND33_35_37_39_LID,
        NVRAM_EF_AST_TL1_PATHLOSS_BAND34_LID,
        NVRAM_EF_AST_TL1_PATHLOSS_BAND36_LID,
        NVRAM_EF_AST_TL1_PATHLOSS_BAND38_LID,
        NVRAM_EF_AST_TL1_PATHLOSS_BAND40_LID,
        NVRAM_EF_AST_TL1_TXDAC_BAND33_35_37_39_LID,
        NVRAM_EF_AST_TL1_TXDAC_BAND34_LID,
        NVRAM_EF_AST_TL1_TXDAC_BAND36_LID,
        NVRAM_EF_AST_TL1_TXDAC_BAND38_LID,
        NVRAM_EF_AST_TL1_TXDAC_BAND40_LID,
        NVRAM_EF_AST_TL1_ABB_CAL_LID,
        NVRAM_EF_AST_TL1_END = NVRAM_EF_AST_TL1_ABB_CAL_LID,

        NVRAM_EF_BARCODE_NUM_LID,
        NVRAM_EF_CAL_FLAG_LID,
        NVRAM_EF_CAL_DATA_CHECK_LID,
        NVRAM_EF_RF_CAL_ENV_LID,
        NVRAM_EF_RF_CAL_LOSS_SETTING_LID,
        NVRAM_EF_RF_TEST_POWER_RESULT_LID,

        /* PA 8-level control (for MT6276, MT6573) */
        NVRAM_EF_UL1_TXPAOCTLEV_START,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND1_LID = NVRAM_EF_UL1_TXPAOCTLEV_START,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND2_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND3_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND4_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND5_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND6_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND7_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND8_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND9_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_BAND10_LID,
        NVRAM_EF_UL1_TXPAOCTLEV_END = NVRAM_EF_UL1_TXPAOCTLEV_BAND10_LID,

        /********************************************************/
        /* MT6573 3G RF Customization for Modem Bin Update Tool */
        /********************************************************/
        /*for modem bin update tool*/
        NVRAM_EF_L1_2G_RF_PARAMETER_LID,
        /* For WNDRV Tx Power Calibration Free Flow */
        NVRAM_EF_WNDRV_TPCFF_LID,

        /* AST 3001 DCXO support */
        NVRAM_EF_AST_TL1_CAP_DATA_LID,

     	NVRAM_EF_CALIBRATION_END = 120,

    /********************************************
     *
     *  Device Setting
     *
     **********************************************/
        NVRAM_EF_BAND_INFO_LID,
        NVRAM_EF_TST_FILTER_LID,
        NVRAM_EF_PORT_SETTING_LID,
        NVRAM_EF_PS_L2COPRO_FILTER_SETTINGS_LID,  //L2Copro filter settings
        NVRAM_EF_CLASSMARK_RACAP_LID,
        NVRAM_EF_SIM_ASSERT_LID,
        NVRAM_EF_RTC_DATA_LID,
        NVRAM_EF_NET_PAR_LID,
        NVRAM_EF_UMTS_PLMN_LID,
        NVRAM_EF_UMTS_IMSI_LID,
        NVRAM_EF_UMTS_START_HFN_LID,
        NVRAM_EF_UMTS_USIME_RRC_DYNAMIC_CAP_LID,
        NVRAM_EF_L1_3G_CAL_DATA_LID,
        NVRAM_EF_FLC_STATISTICS_LID,
        NVRAM_EF_ECOMPASS_DATA_LID,
        NVRAM_EF_BAND_BLOCK_LID,
        NVRAM_EF_UMTS_FREQUENCY_REPOSITORY_LID,


        NVRAM_EF_CUST_HW_LEVEL_TBL_LID,
        NVRAM_EF_UEM_MANUFACTURE_DATA_LID,
        NVRAM_EF_UEM_RMI_DATA_LID,

        
        /* GPS */
        NVRAM_EF_GPS_SETTING_DATA_LID,
        NVRAM_EF_MNL_SETTING_DATA_LID,

        /* __WIFI_BT_SINGLE_ANTENNA_SUPPORT__ */
        NVRAM_EF_BWCS_SETTING_DATA_LID,

        /* MYBCCH */
        NVRAM_EF_MYBCCH_SETTING_DATA_LID,

    /********************************************
     *
     *  L4 Item
     *
     **********************************************/

        NVRAM_EF_L4_START,
        NVRAM_EF_TCM_STATISTICS_LID,
        NVRAM_EF_TCM_PDP_PROFILE_LID,
        NVRAM_EF_CFU_FLAG_LID,
        NVRAM_EF_MM_EQPLMN_LOCIGPRS_LID,
        NVRAM_EF_CTM_DEFAULT_SETTINGS_LID,
        NVRAM_EF_ALS_LINE_ID_LID,
        NVRAM_EF_MSCAP_LID,
        NVRAM_EF_ATCMD_ON_OFF_CHECK_LID,
        NVRAM_EF_SMSAL_SMS_LID,
        NVRAM_EF_SMSAL_MAILBOX_ADDR_LID,
        NVRAM_EF_SMSAL_COMMON_PARAM_LID,
        NVRAM_EF_SMSAL_SMSP_LID,
        NVRAM_EF_SMSAL_MWIS_LID,
        NVRAM_EF_CB_DEFAULT_CH_LID,
        NVRAM_EF_CB_CH_INFO_LID,
        NVRAM_EF_IMEI_IMEISV_LID,
        NVRAM_EF_SML_LID,                   /* SIM-ME Lock */
        NVRAM_EF_SIM_LOCK_LID, /* __SMART_PHONE_MODEM__ */
        NVRAM_EF_MS_SECURITY_LID,
    #ifndef __PHB_STORAGE_BY_MMI__
        NVRAM_EF_PHB_LID,
    #endif        
        NVRAM_EF_PHB_LN_ENTRY_LID,      //__PHB_NO_CALL_LOG__
        NVRAM_EF_PHB_LN_TYPE_SEQ_LID,   //__PHB_NO_CALL_LOG__
        NVRAM_EF_PS_CONFORMANCE_TESTMODE_LID,   /* 2010.11.4   Add for EM menu for TestMode */
        NVRAM_EF_ETWS_SETTING_LID, 
        NVRAM_EF_MOBILE_BROADBAND_PROVISION_CONTEXT_LID, //__MOBILE_BROADBAND_PROVISION_CONTEXT__
        NVRAM_EF_CSM_ESSP_LID,
        NVRAM_EF_L4_END,

    /********************************************
     *
     *  Other Items
     *
     **********************************************/

        
        NVRAM_EF_SYS_CACHE_OCTET_LID,
		/*DRM V2.0*/
        NVRAM_EF_DRM_SETTING_LID,
        NVRAM_EF_DRM_STIME_LID,
        NVRAM_EF_DRM_CERPATH_LID,

        NVRAM_EF_RAC_PREFERENCE_LID,

        NVRAM_EF_MM_IMSI_LOCI_GLOCI_LID,  //for man-in-middle-attach prevention


        NVRAM_EF_UMTS_URR_CONFIGURATION_LID,
        NVRAM_EF_TST_CONFIG_LID,
        NVRAM_EF_NVRAM_UNIT_TEST_LID,
        NVRAM_EF_ABM_PS_QOS_PROFILE_LID,
        /* Don't remove this line: insert LID definition above */
        NVRAM_EF_LAST_LID_CORE
    } nvram_lid_core_enum;

typedef unsigned int nvram_lid_core_enum_check[768 -(NVRAM_EF_LAST_LID_CORE - NVRAM_EF_SYS_LID + 1)];

/* MS unique ID */
#define UNI_ID   NVRAM_EF_IMEI_IMEISV_LID

/**
 * Step 2:
 * Defines constants of size and number of records for each logical data item.
 * For linear-fixed, TOTAL is greater than 1, and SIZE is size of each record;
 * for transparent, TOTAL must be exaclty 1, and SIZE is size of entire data item.
 *
 * Each logical data item must be:
 * 1> Size must be EVEN
 * 2> Size of default value must be equal to the logical data item's size.
 *
 * Notice:
 * If total number of L1 Calibration data items is changed, NVRAM_L1CAL_ELEMENT_TOTAL
 * must be modified properly.
 */

/** System record:
 * [  DATA_VERSION  ][ PADDING ][ LOCK_PATTERN ]
 *    18 bytes          4 bytes  12 bytes
 * Size must be 
 * strlen(CODED_DATA_VERSION) + strlen(CODED_PADDING_LENGTH) + strlen(NVRAM_LOCK_PATTERN) 
 * And must be even-byte aligned.
 *
 * System record is two-copied. It is controlled directly by NVRAM Layer itself.
 * Ie, their record ID's are: 1 and 2.
 */


#define CODED_DATA_VERSION_SIZE           18
#define CODED_PADDING_SIZE                4

#define CODED_LOCK_PATTERN_SIZE           12
#define CODED_LOCK_PATTERN_OFFSET         22


#define NVRAM_EF_IMPT_COUNTER_SIZE       2
#define NVRAM_EF_IMPT_COUNTER_TOTAL      1

/**
 * TST Filter
 *   PS filter length + L1 filter length (current max number is TST_L1TRC_FILTER_NUM, exact number should be decided at codegen stage)
 */
#define NVRAM_EF_TST_FILTER_SIZE         (((END_OF_MOD_ID+7)/8) + (LAST_SAP_CODE+1) + (2*(END_OF_MOD_ID+1)) + NVRAM_DUAL_RECORD*TST_L1TRC_FILTER_NUM*5)
#define NVRAM_EF_TST_FILTER_TOTAL        1

/**
 * Port Setting
 */
#define NVRAM_EF_PORT_SETTING_SIZE         sizeof(port_setting_struct)
#define NVRAM_EF_PORT_SETTING_TOTAL        1


/**
 * System Exception Dumping
 */
#define NVRAM_EF_SYS_EXCEPTION_SIZE       TOTAL_EXPTR_SIZE
#ifdef LOW_COST_SUPPORT
#define NVRAM_EF_SYS_EXCEPTION_TOTAL      5
#else
#define NVRAM_EF_SYS_EXCEPTION_TOTAL      10
#endif

/**
 * System Statistics
 */
#define NVRAM_EF_SYS_STATISTICS_SIZE       sizeof(stack_statistics_struct)
#define NVRAM_EF_SYS_STATISTICS_TOTAL      1

/************************************************************
 * Start of L1 Calibration data
 ************************************************************/
/**
 * Total number of L1 Calibration data items
 */
#if defined(__EPSK_TX__)
#define NVRAM_EF_L1_EPSK_SUBTRAHEND 0
#else
#define NVRAM_EF_L1_EPSK_SUBTRAHEND (NVRAM_EF_L1_EPSK_END - NVRAM_EF_L1_EPSK_START + 1)
#endif

#if defined(__PS_SERVICE__)
   #define NVRAM_EF_L1_PS_SERVICE_SUBTRAHEND 0
#else
   #define NVRAM_EF_L1_GMSK_TX_POWER_ROLLBACK_SUBTRAHEND 1
   
   #define NVRAM_EF_L1_PS_SERVICE_SUBTRAHEND (NVRAM_EF_L1_GMSK_TX_POWER_ROLLBACK_SUBTRAHEND)
#endif /*defined(__PS_SERVICE__)*/

#if defined(__EGPRS_MODE__)
   #define NVRAM_EF_L1_EGPRS_MODE_SUBTRAHEND 0
#else
   #define NVRAM_EF_L1_EPSK_TX_POWER_ROLLBACK_SUBTRAHEND 1
   
   #define NVRAM_EF_L1_EGPRS_MODE_SUBTRAHEND (NVRAM_EF_L1_EPSK_TX_POWER_ROLLBACK_SUBTRAHEND)
#endif /*defined(__EGPRS_MODE__)*/ 

#if defined(__2G_TX_POWER_CONTROL_SUPPORT__)
   #if defined(__EPSK_TX__)
#define NVRAM_EF_L1_EPSK_TXPC_SUBTRAHEND 0
   #else
#define NVRAM_EF_L1_EPSK_TXPC_SUBTRAHEND 1
   #endif /*__EPSK_TX__*/
#else
#define NVRAM_EF_L1_EPSK_TXPC_SUBTRAHEND 2
#endif /*__2G_TX_POWER_CONTROL_SUPPORT__*/

#if defined(__MULTI_LNA_MODE_CALIBRATION_SUPPORT__)
#define NVRAM_EF_L1_LNAPATHLOSS_SUBTRAHEND 0
#else
#define NVRAM_EF_L1_LNAPATHLOSS_SUBTRAHEND 1
#endif

#if defined(__2G_TX_POWER_CONTROL_SUPPORT__)
   #if !defined(__UMTS_RAT__) || !defined(__MTK_UL1_FDD__)
#define NVRAM_EF_L1_TEMPERATURE_ADC_SUBTRAHEND 0
   #else
/* under construction !*/
   #endif
#else
#define NVRAM_EF_L1_TEMPERATURE_ADC_SUBTRAHEND 1
#endif /*__2G_TX_POWER_CONTROL_SUPPORT__*/

#if defined(__F32_XOSC_REMOVAL_SUPPORT__)
#define NVRAM_EF_L1_CLOAD_FREQ_OFFSET_SUBTRAHEND 0
#else
#define NVRAM_EF_L1_CLOAD_FREQ_OFFSET_SUBTRAHEND 1
#endif /*__F32_XOSC_REMOVAL_SUPPORT__*/

#define NVRAM_L1CAL_ELEMENT_TOTAL  (NVRAM_EF_L1_END - NVRAM_EF_L1_START + 1 - \
                                    NVRAM_EF_L1_EPSK_SUBTRAHEND -             \
                                    NVRAM_EF_L1_PS_SERVICE_SUBTRAHEND -       \
                                    NVRAM_EF_L1_EGPRS_MODE_SUBTRAHEND -       \
                                    NVRAM_EF_L1_EPSK_TXPC_SUBTRAHEND -        \
                                    NVRAM_EF_L1_LNAPATHLOSS_SUBTRAHEND -      \
                                    NVRAM_EF_L1_TEMPERATURE_ADC_SUBTRAHEND -  \
                                    NVRAM_EF_L1_CLOAD_FREQ_OFFSET_SUBTRAHEND)

/**
 * Total number of UL1 Calibration data items
 */
#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
/* under construction !*/
/* under construction !*/
/* under construction !*/
   #if defined (__UL1_HS_PLATFORM__)
/* under construction !*/
   #else
/* under construction !*/
   #endif
/* under construction !*/
   #if defined (__UL1_HS_PLATFORM__)
/* under construction !*/
   #else
/* under construction !*/
   #endif // #if defined (__UL1_HS_PLATFORM__)
#else
#define NVRAM_UL1CAL_ELEMENT_TOTAL 0
#endif

/**
 * L1 AGC Path Loss
 */
#define NVRAM_EF_L1_AGCPATHLOSS_SIZE     sizeof(l1cal_agcPathLoss_T)
#define NVRAM_EF_L1_AGCPATHLOSS_TOTAL    1

/**
 * L1 Ramp Table for GSM850
 */
#define NVRAM_EF_L1_RAMPTABLE_GSM850_SIZE    sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_RAMPTABLE_GSM850_TOTAL   1

/**
 * L1 Ramp Table for GSM900
 */
#define NVRAM_EF_L1_RAMPTABLE_GSM900_SIZE    sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_RAMPTABLE_GSM900_TOTAL   1

/**
 * L1 Ramp Table for DCS1800
 */
#define NVRAM_EF_L1_RAMPTABLE_DCS1800_SIZE   sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_RAMPTABLE_DCS1800_TOTAL  1

/**
 * L1 Ramp Table for PCS1900
 */
#define NVRAM_EF_L1_RAMPTABLE_PCS1900_SIZE   sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_RAMPTABLE_PCS1900_TOTAL  1

#if defined(__EPSK_TX__)
/**
 * L1 EPSK_Ramp Table for GSM850
 */
#define NVRAM_EF_L1_EPSK_RAMPTABLE_GSM850_SIZE    sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_EPSK_RAMPTABLE_GSM850_TOTAL   1

/**
 * L1 EPSK_Ramp Table for GSM900
 */
#define NVRAM_EF_L1_EPSK_RAMPTABLE_GSM900_SIZE    sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_EPSK_RAMPTABLE_GSM900_TOTAL   1

/**
 * L1 EPSK_Ramp Table for DCS1800
 */
#define NVRAM_EF_L1_EPSK_RAMPTABLE_DCS1800_SIZE   sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_EPSK_RAMPTABLE_DCS1800_TOTAL  1

/**
 * L1 EPSK_Ramp Table for PCS1900
 */
#define NVRAM_EF_L1_EPSK_RAMPTABLE_PCS1900_SIZE   sizeof(l1cal_rampTable_T)
#define NVRAM_EF_L1_EPSK_RAMPTABLE_PCS1900_TOTAL  1
#endif /* defined(__EPSK_TX__) */ 
/**
 * L1 AFC Data
 */
#define NVRAM_EF_L1_AFCDATA_SIZE         sizeof(l1cal_afcData_T)
#define NVRAM_EF_L1_AFCDATA_TOTAL        1

/**
 * L1 TXIQ Calibration data
 */
#define NVRAM_EF_L1_TXIQ_SIZE         sizeof(l1cal_txiq_T)
#define NVRAM_EF_L1_TXIQ_TOTAL        1

/**
 * L1 RF Special Coef Calibration data
 */
#define NVRAM_EF_L1_RFSPECIALCOEF_SIZE         sizeof(l1cal_rfspecialcoef_T)
#define NVRAM_EF_L1_RFSPECIALCOEF_TOTAL        1

/**
 * L1 CLoad freq offset Calibration data
 */
#define NVRAM_EF_L1_CLOAD_FREQ_OFFSET_SIZE         sizeof(l1cal_cload_freq_offset_T)
#define NVRAM_EF_L1_CLOAD_FREQ_OFFSET_TOTAL        1

/**
 * L1 Inter-slot ramp table Calibration data for GSM 850
 */
#define NVRAM_EF_L1_INTERSLOT_RAMP_GSM850_SIZE    sizeof(l1cal_interRampData_T)
#define NVRAM_EF_L1_INTERSLOT_RAMP_GSM850_TOTAL   1

/**
 * L1 Inter-slot ramp table Calibration data for GSM 900
 */
#define NVRAM_EF_L1_INTERSLOT_RAMP_GSM900_SIZE    sizeof(l1cal_interRampData_T)
#define NVRAM_EF_L1_INTERSLOT_RAMP_GSM900_TOTAL   1

/**
 * L1 Inter-slot ramp table Calibration data for DCS 1800
 */
#define NVRAM_EF_L1_INTERSLOT_RAMP_DCS1800_SIZE    sizeof(l1cal_interRampData_T)
#define NVRAM_EF_L1_INTERSLOT_RAMP_DCS1800_TOTAL   1

/**
 * L1 Inter-slot ramp table Calibration data for PCS 1900
 */
#define NVRAM_EF_L1_INTERSLOT_RAMP_PCS1900_SIZE    sizeof(l1cal_interRampData_T)
#define NVRAM_EF_L1_INTERSLOT_RAMP_PCS1900_TOTAL   1

#if defined(__EPSK_TX__)
/**********************************************************************************/
/**
 * L1 EPSK Inter-slot ramp table Calibration data for GSM 850
 */
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_GSM850_SIZE    sizeof(l1cal_EPSK_interRampData_T)
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_GSM850_TOTAL   1

/**
 * L1 EPSK Inter-slot ramp table Calibration data for GSM 900
 */
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_GSM900_SIZE    sizeof(l1cal_EPSK_interRampData_T)
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_GSM900_TOTAL   1

/**
 * L1 EPSK Inter-slot ramp table Calibration data for DCS 1800
 */
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_DCS1800_SIZE    sizeof(l1cal_EPSK_interRampData_T)
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_DCS1800_TOTAL   1

/**
 * L1 EPSK Inter-slot ramp table Calibration data for PCS 1900
 */
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_PCS1900_SIZE    sizeof(l1cal_EPSK_interRampData_T)
#define NVRAM_EF_L1_EPSK_INTERSLOT_RAMP_PCS1900_TOTAL   1

#endif /* defined(__EPSK_TX__) */ 

/**********************************************************************************/
#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
#if defined (__UL1_HS_PLATFORM__)
/* under construction !*/
/* under construction !*/
#endif /* #if defined (__UL1_HS_PLATFORM__) */
/* under construction !*/
#endif /* __UMTS_RAT__ && __MTK_UL1_FDD__ */


#ifdef __AST_TL1_TDD__ 

#define NVRAM_EF_AST_TL1_TEMP_DAC_SIZE    sizeof(ast_tl1cal_tempdacData_T)
#define NVRAM_EF_AST_TL1_TEMP_DAC_TOTAL   1

#define NVRAM_EF_AST_TL1_AFC_DATA_SIZE    sizeof(ast_tl1cal_afcData_T)
#define NVRAM_EF_AST_TL1_AFC_DATA_TOTAL   1

#define NVRAM_EF_AST_TL1_PATHLOSS_BAND_SIZE    sizeof(ast_tl1cal_pathlossData_T)
#define NVRAM_EF_AST_TL1_PATHLOSS_BAND_TOTAL   1

#define NVRAM_EF_AST_TL1_TXDAC_BAND_SIZE    sizeof(ast_tl1cal_txdacData_T)
#define NVRAM_EF_AST_TL1_TXDAC_BAND_TOTAL   1
 
#define NVRAM_EF_AST_TL1_ABB_CAL_SIZE    sizeof(ast_tl1cal_abbData_T)
#define NVRAM_EF_AST_TL1_ABB_CAL_TOTAL   1

#define NVRAM_EF_AST_TL1_CAP_DATA_SIZE    sizeof(ast_tl1cal_capData_T)
#define NVRAM_EF_AST_TL1_CAP_DATA_TOTAL   1
#endif // end of __AST_TL1_TDD__


/**********************************************************************************/
/**
 * L1 Crystal AFC Data
 */
#define NVRAM_EF_L1_CRYSTAL_AFCDATA_SIZE         sizeof(l1cal_crystalAfcData_T)
#define NVRAM_EF_L1_CRYSTAL_AFCDATA_TOTAL        1

/**
 * L1 Crystal CAP Data
 */
#define NVRAM_EF_L1_CRYSTAL_CAPDATA_SIZE         sizeof(l1cal_crystalCapData_T)
#define NVRAM_EF_L1_CRYSTAL_CAPDATA_TOTAL        1

/**
 * L1 Tx power rollback table
 */
#define NVRAM_EF_L1_GMSK_TX_POWER_ROLLBACK_TABLE_SIZE    sizeof(l1cal_tx_power_rollback_T)
#define NVRAM_EF_L1_GMSK_TX_POWER_ROLLBACK_TABLE_TOTAL   1

#define NVRAM_EF_L1_EPSK_TX_POWER_ROLLBACK_TABLE_SIZE    sizeof(l1cal_tx_power_rollback_T)
#define NVRAM_EF_L1_EPSK_TX_POWER_ROLLBACK_TABLE_TOTAL   1

/**
 * L1 TX power control ADC Data
 */
#define NVRAM_EF_L1_GMSK_TXPC_SIZE    sizeof(l1cal_txpc_T)
#define NVRAM_EF_L1_GMSK_TXPC_TOTAL   1

#define NVRAM_EF_L1_EPSK_TXPC_SIZE    sizeof(l1cal_txpc_T)
#define NVRAM_EF_L1_EPSK_TXPC_TOTAL   1

/**
 * L1 LNA Path Loss
 */
#define NVRAM_EF_L1_LNAPATHLOSS_SIZE     sizeof(l1cal_lnaPathLoss_T)
#define NVRAM_EF_L1_LNAPATHLOSS_TOTAL    1

#define NVRAM_EF_L1_2G_RF_PARAMETER_SIZE    sizeof(l1d_rf_custom_input_data_T)
#define NVRAM_EF_L1_2G_RF_PARAMETER_TOTAL   1

/**
 * L1 Temperature ADC
 */
#define NVRAM_EF_L1_TEMPERATURE_ADC_SIZE  sizeof(l1cal_temperatureADC_T)
#define NVRAM_EF_L1_TEMPERATURE_ADC_TOTAL 1

/************************************************************
 * End of L1 Calibration data
 ************************************************************/
/************************************************************
 * Start of WNDRV Calibration data
 ************************************************************/
 /**
 * Total number of WNDRV Calibration data items
 */
#define NVRAM_WNDRV_CAL_ELEMENT_TOTAL NVRAM_EF_WNDRV_END - NVRAM_EF_WNDRV_START + 1

/**
 * WNDRV Permanent MAC Address
 */
#define NVRAM_EF_WNDRV_MAC_ADDRESS_SIZE     sizeof(wndrv_cal_mac_addr_struct)
#define NVRAM_EF_WNDRV_MAC_ADDRESS_TOTAL    1

/**
 * WNDRV 2.4G TX Power Table
 */
#define NVRAM_EF_WNDRV_TX_POWER_2400M_SIZE    sizeof(wndrv_cal_txpwr_2400M_struct)
#define NVRAM_EF_WNDRV_TX_POWER_2400M_TOTAL   1

/**
 * WNDRV 5.0G TX Power Table
 */
#define NVRAM_EF_WNDRV_TX_POWER_5000M_SIZE    sizeof(wndrv_cal_txpwr_5000M_struct)
#define NVRAM_EF_WNDRV_TX_POWER_5000M_TOTAL   1

/**
 * WNDRV DAC DC OFFSET
 */
#define NVRAM_EF_WNDRV_DAC_DC_OFFSET_SIZE    sizeof(wndrv_cal_dac_dc_offset_struct)
#define NVRAM_EF_WNDRV_DAC_DC_OFFSET_TOTAL   1


#define NVRAM_EF_WNDRV_TX_ALC_POWER_SIZE    sizeof(wndrv_cal_tx_ALC_2400M_struct)
#define NVRAM_EF_WNDRV_TX_ALC_POWER_TOTAL   1

#define NVRAM_EF_WNDRV_EXT_SETTING_TRIMVAL_THERMOVAL_SIZE    sizeof(wndrv_cal_setting_trim_thermo_struct)
#define NVRAM_EF_WNDRV_EXT_SETTING_TRIMVAL_THERMOVAL_TOTAL   1

#define NVRAM_EF_WNDRV_ALC_SLOPE_SIZE    sizeof(wndrv_cal_ALC_Slope_2400M_struct)
#define NVRAM_EF_WNDRV_ALC_SLOPE_TOTAL   1

#define NVRAM_EF_WNDRV_TPCFF_SIZE    sizeof(wndrv_cal_txpwr_cal_free_flow_struct)
#define NVRAM_EF_WNDRV_TPCFF_TOTAL    1
/************************************************************
 * End of WNDRV Calibration data
 ************************************************************/

#define NVRAM_EF_BTRADIO_RFMD3500_TOTAL		 1
#ifdef  __NVRAM_EF_BTRADIO_RFMD3500_STRUCT__
   #define NVRAM_EF_BTRADIO_RFMD3500_SIZE       sizeof(nvram_ef_btradio_rfmd3500_struct)
#else
   #define NVRAM_EF_BTRADIO_RFMD3500_SIZE       150
#endif

#define NVRAM_EF_BTRADIO_MT6601_TOTAL		 1
#ifdef  __NVRAM_EF_BTRADIO_MT6601_STRUCT__
   #define NVRAM_EF_BTRADIO_MT6601_SIZE       sizeof(nvram_ef_btradio_mt6601_struct)
#else
   #define NVRAM_EF_BTRADIO_MT6601_SIZE       141
#endif
#define NVRAM_EF_BTRADIO_MT6611_TOTAL		 1
#ifdef  __NVRAM_EF_BTRADIO_MT6611_STRUCT__
   #define NVRAM_EF_BTRADIO_MT6611_SIZE       sizeof(nvram_ef_btradio_mt6611_struct)
#else
   #define NVRAM_EF_BTRADIO_MT6611_SIZE       46
#endif

#if 0
/* under construction !*/
#ifdef  __NVRAM_EF_BTRADIO_MT6612_STRUCT__
/* under construction !*/
#else
/* under construction !*/
#endif
/* under construction !*/
/* under construction !*/
#ifdef  __NVRAM_EF_BTRADIO_MT6616_STRUCT__
/* under construction !*/
#else
/* under construction !*/
#endif
#endif
#if 0
/* under construction !*/
#ifdef  __NVRAM_EF_BTRADIO_MT6236_STRUCT__
/* under construction !*/
#else
/* under construction !*/
#endif
/* under construction !*/
/* under construction !*/
#ifdef  __NVRAM_EF_BTRADIO_MT6256_STRUCT__
/* under construction !*/
#else
/* under construction !*/
#endif
/* under construction !*/
/* under construction !*/
#ifdef  __NVRAM_EF_BTRADIO_MT6276_STRUCT__
/* under construction !*/
#else
/* under construction !*/
#endif
#endif

#define NVRAM_EF_BTRADIO_MTK_BT_CHIP_TOTAL		 1
#ifdef  __NVRAM_EF_BTRADIO_MTK_BT_CHIP_STRUCT__
   #define NVRAM_EF_BTRADIO_MTK_BT_CHIP_SIZE       sizeof(nvram_ef_btradio_mtk_bt_chip_struct)
#else
   #define NVRAM_EF_BTRADIO_MTK_BT_CHIP_SIZE       47
#endif


/**
 * MSCAP
 */
//[MAUI_00740014]: __REL4__ supported speech codec
//0528_AMRWB
#define NVRAM_EF_MSCAP_SIZE              8

#define NVRAM_EF_MSCAP_TOTAL             (1 * NVRAM_DUAL_RECORD)

/**
 * CLASSMARK_RACAP
 */

#if defined(__SAIC__) || defined(__REPEATED_ACCH__)
#define NVRAM_EF_CLASSMARK_RACAP_SIZE          16
#else
#define NVRAM_EF_CLASSMARK_RACAP_SIZE          14  /* Evelyn 20090422: set 8PSK power class in NVRAM*/
#endif
#define NVRAM_EF_CLASSMARK_RACAP_TOTAL         1
/** EQ_PLMN
 * 
 */
#define NVRAM_EF_EQ_PLMN_SIZE            38
#define NVRAM_EF_EQ_PLMN_TOTAL           (1 * NVRAM_DUAL_RECORD)

/** BAND_INFO
 * 
 */
#define NVRAM_EF_BAND_INFO_SIZE            6
#define NVRAM_EF_BAND_INFO_TOTAL           (1 * NVRAM_DUAL_RECORD)

/**
 * Drx parameters
 */
#define NVRAM_EF_DRX_PARAM_SIZE           2
#define NVRAM_EF_DRX_PARAM_TOTAL          1

/**
 * SMSAL common parameters
 */
#define NVRAM_EF_SMSAL_COMMON_PARAM_SIZE           16
#define NVRAM_EF_SMSAL_COMMON_PARAM_TOTAL          (1 * NVRAM_DUAL_RECORD)

/**
 * SMSAL mailbox addresses
 */
#ifdef __MAX_MAILBOX_NAME_UPDATA_TO_30__
#define NVRAM_EF_SMSAL_MAILBOX_ADDR_SIZE           54
#else
#define NVRAM_EF_SMSAL_MAILBOX_ADDR_SIZE           34
#endif
#ifdef __SMS_MSP_UP_TO_4__
#define NVRAM_EF_SMSAL_MAILBOX_ADDR_TOTAL          (4 * NVRAM_DUAL_RECORD)
#else
#define NVRAM_EF_SMSAL_MAILBOX_ADDR_TOTAL          (2 * NVRAM_DUAL_RECORD)
#endif

/**
 * SMSAL short messages
 */
#define NVRAM_EF_SMSAL_SMS_SIZE              184
/*#if defined(LOW_COST_SUPPORT)
#define NVRAM_EF_SMSAL_SMS_TOTAL             (10 * NVRAM_DUAL_RECORD)
#else
#define NVRAM_EF_SMSAL_SMS_TOTAL             (200 * NVRAM_DUAL_RECORD)
#endif // LOW_COST_SUPPORT
*/
#define NVRAM_EF_SMSAL_SMS_TOTAL    (SMS_PHONE_ENTRY * NVRAM_DUAL_RECORD)

/**
 * CB Default Channel Setting
 */
#define NVRAM_EF_CB_DEFAULT_CH_SIZE          20
#define NVRAM_EF_CB_DEFAULT_CH_TOTAL         (1 * NVRAM_DUAL_RECORD)

/**
 * SMSAL short message service parameters
 */
#define NVRAM_EF_SMSAL_SMSP_SIZE           40   /* 28(SMSAL_SMSP_LEN)+10 */
#define NVRAM_EF_SMSAL_SMSP_TOTAL          (2 * NVRAM_DUAL_RECORD)

/**
 * CB Mask
 */
#define NVRAM_EF_CB_CH_INFO_SIZE              sizeof(nvram_ef_cb_ch_info_struct)
#define NVRAM_EF_CB_CH_INFO_TOTAL             (1 * NVRAM_DUAL_RECORD)

/**
 * SMSAL message waiting indication status
 */
#define NVRAM_EF_SMSAL_MWIS_SIZE           6
#ifdef __REL4__
#ifdef __SMS_MSP_UP_TO_4__
#define NVRAM_EF_SMSAL_MWIS_TOTAL          (5 * NVRAM_DUAL_RECORD)
#else
#define NVRAM_EF_SMSAL_MWIS_TOTAL          (3 * NVRAM_DUAL_RECORD)
#endif
#else
#define NVRAM_EF_SMSAL_MWIS_TOTAL          (2 * NVRAM_DUAL_RECORD)
#endif //__REL4__

/**
 * TCP statistics
 */
#define NVRAM_EF_TCM_STATISTICS_SIZE         16 /* 22 */
#define NVRAM_EF_TCM_STATISTICS_TOTAL        (1 * NVRAM_DUAL_RECORD)

#if defined(__CCM_NO_RESET__)
/**
 * Add last call cost
 */
#define NVRAM_EF_ALS_LINE_ID_SIZE             6
#define NVRAM_EF_ALS_LINE_ID_TOTAL            (1 * NVRAM_DUAL_RECORD)
#elif defined (__CPHS__)
/**
 * Line id
 */
#define NVRAM_EF_ALS_LINE_ID_SIZE             2
#define NVRAM_EF_ALS_LINE_ID_TOTAL            (1 * NVRAM_DUAL_RECORD)
#endif  

/**
 * CFU FLAG
 */
#define NVRAM_EF_CFU_FLAG_SIZE             2
#define NVRAM_EF_CFU_FLAG_TOTAL            (1 * NVRAM_DUAL_RECORD)

#define NVRAM_EF_CSM_ESSP_SIZE             1 
#define NVRAM_EF_CSM_ESSP_TOTAL            1

/* Johnny 2005/11/07: add eqplmn_locigprs in nvram */
#ifdef __REL6__
#define NVRAM_EF_MM_EQPLMN_LOCIGPRS_SIZE (52+60)
#else
#define NVRAM_EF_MM_EQPLMN_LOCIGPRS_SIZE 52
#endif
#define NVRAM_EF_MM_EQPLMN_LOCIGPRS_TOTAL (1 * NVRAM_DUAL_RECORD)
#define NVRAM_EF_MM_IMSI_LOCI_GLOCI_SIZE (9+11+14)
#define NVRAM_EF_MM_IMSI_LOCI_GLOCI_TOTAL (1 * NVRAM_DUAL_RECORD)

/*
 * SIM log
 */
#define NVRAM_EF_SIM_ASSERT_SIZE  16
#if defined(LOW_COST_SUPPORT)
#define NVRAM_EF_SIM_ASSERT_TOTAL 10
#else
#define NVRAM_EF_SIM_ASSERT_TOTAL 80
#endif

#define NVRAM_EF_RTC_DATA_SIZE      sizeof(nvram_ef_rtc_calibration)
#define NVRAM_EF_RTC_DATA_TOTAL     1



#ifdef __UMTS_RAT__
/* under construction !*/
#else
#define NVRAM_EF_NET_PAR_SIZE			2000 /* MAX_NVRAM_RECORD_SIZE */
#endif
#define NVRAM_EF_NET_PAR_TOTAL			1

/*
 * BAND_BLOCK 
 */
#ifdef __BAND_BLOCK__
#define NVRAM_EF_BAND_BLOCK_SIZE            52
#define NVRAM_EF_BAND_BLOCK_TOTAL           1
#endif /* __BAND_BLOCK__ */

/*
 * 3G Monza
 */
#define NVRAM_EF_UMTS_PLMN_SIZE				4
#define NVRAM_EF_UMTS_PLMN_TOTAL				1

#define NVRAM_EF_UMTS_IMSI_SIZE				24
#define NVRAM_EF_UMTS_IMSI_TOTAL				1

#define NVRAM_EF_UMTS_START_HFN_SIZE			6
#define NVRAM_EF_UMTS_START_HFN_TOTAL			1

#define NVRAM_EF_UMTS_CSE_CACHE_INFO_SIZE       8190
#define NVRAM_EF_UMTS_CSE_CACHE_INFO_TOTAL      1

#ifdef __UMTS_R7__
#define NVRAM_EF_UMTS_USIME_RRC_DYNAMIC_CAP_SIZE      (35+3+2+2)
#elif defined(__UMTS_R6__)
#define NVRAM_EF_UMTS_USIME_RRC_DYNAMIC_CAP_SIZE      (35+3+2)
#elif defined(__UMTS_R5__)
#define NVRAM_EF_UMTS_USIME_RRC_DYNAMIC_CAP_SIZE      (35+3)
#else
#define NVRAM_EF_UMTS_USIME_RRC_DYNAMIC_CAP_SIZE      35
#endif
#define NVRAM_EF_UMTS_USIME_RRC_DYNAMIC_CAP_TOTAL     1

#define NVRAM_EF_UMTS_FREQUENCY_REPOSITORY_SIZE             2000
#define NVRAM_EF_UMTS_FREQUENCY_REPOSITORY_TOTAL            1
        
#define NVRAM_EF_UMTS_URR_CONFIGURATION_SIZE          2
#define NVRAM_EF_UMTS_URR_CONFIGURATION_TOTAL         1

#define NVRAM_EF_L1_3G_CAL_DATA_SIZE		8184
#define NVRAM_EF_L1_3G_CAL_DATA_TOTAL		1

#define NVRAM_EF_FLC_STATISTICS_SIZE        2000
#define NVRAM_EF_FLC_STATISTICS_TOTAL       1 

#if defined (__E_COMPASS_SENSOR_SUPPORT__)
#define NVRAM_EF_ECOMPASS_DATA_SIZE         sizeof(nvram_ef_ecompass_calibration)
#define NVRAM_EF_ECOMPASS_DATA_TOTAL        1 
#endif  /* __E_COMPASS_SENSOR_SUPPORT__ */

#define NVRAM_EF_ATCMD_ON_OFF_CHECK_SIZE        (sizeof(nvram_atcmd_check_context_struct))
#define NVRAM_EF_ATCMD_ON_OFF_CHECK_TOTAL     1 

#define NVRAM_EF_ETWS_SETTING_SIZE        (sizeof(nvram_ef_etws_setting_struct))
#define NVRAM_EF_ETWS_SETTING_TOTAL     1

#if defined (__ENABLE_MYBCCH__)
#define NVRAM_EF_MYBCCH_SETTING_DATA_SIZE        (sizeof(nvram_ef_mybcch_setting_struct))
#define NVRAM_EF_MYBCCH_SETTING_DATA_TOTAL 1
#endif /* __ENABLE_MYBCCH__ */

/**
 * IMEI/IMEISV
 */
#ifdef __SMART_PHONE_MODEM__
#define NVRAM_EF_IMEI_IMEI_SIZE           8
#define NVRAM_EF_IMEI_IMEISV_SIZE         10
#define NVRAM_EF_IMEI_IMEISV_TOTAL        10
#else
#define NVRAM_EF_IMEI_IMEI_SIZE           8
#define NVRAM_EF_IMEI_IMEISV_SIZE         10
#define NVRAM_EF_IMEI_IMEISV_TOTAL        (1 * NVRAM_DUAL_RECORD)
#endif

/*
 * SIM-ME Lock
 */
#ifdef __SMART_PHONE_MODEM__
#define NVRAM_EF_SML_SIZE   sizeof(nvram_sml_context_struct)
#define NVRAM_EF_SML_TOTAL  10
#else
#define NVRAM_EF_SML_SIZE   sizeof(nvram_sml_context_struct)
#define NVRAM_EF_SML_TOTAL  (1 * NVRAM_DUAL_RECORD)
#endif
/*
 * MS Security
 */
#define NVRAM_EF_MS_SECURITY_SIZE         (38)
#define NVRAM_EF_MS_SECURITY_TOTAL        (1 * NVRAM_DUAL_RECORD)

#ifdef  __SMART_PHONE_MODEM__
#define NVRAM_EF_SIM_LOCK_SIZE sizeof(nvram_sml_context_struct)
#define NVRAM_EF_SIM_LOCK_TOTAL (1 * NVRAM_DUAL_RECORD)
#endif

/* UEM*/
#if 0//__BK_LIGHT_20LEVEL_SUPPORT__
/* under construction !*/
#elif defined(__MULTI_LEVEL_BACKLIGHT_SUPPORT__)
#define NVRAM_EF_CUST_HW_LEVEL_TBL_SIZE     (440+8*PWM_MAX_BACKLIGHT_LEVEL)
#else
#define NVRAM_EF_CUST_HW_LEVEL_TBL_SIZE     440
#endif
#define NVRAM_EF_CUST_HW_LEVEL_TBL_TOTAL   1

extern const kal_uint32 NVRAM_EF_CUST_HW_LEVEL_TBL_DEFAULT[NVRAM_EF_CUST_HW_LEVEL_TBL_SIZE];
/**
 * UEM Manufacturer data
 */
#define NVRAM_EF_UEM_MANUFACTURE_DATA_SIZE         240
#define NVRAM_EF_UEM_MANUFACTURE_DATA_TOTAL        1
/**
 * UEM RMI data
 */
#define NVRAM_EF_UEM_RMI_DATA_SIZE                 216  /* 182 */
#define NVRAM_EF_UEM_RMI_DATA_TOTAL                1


#if defined(__TST_DNT_LOGGING__)
  #define NVRAM_EF_PS_L2COPRO_FILTER_SETTINGS_SIZE 64
  #define NVRAM_EF_PS_L2COPRO_FILTER_SETTINGS_TOTAL 1
#endif  //#if defined(__TST_DNT_LOGGING__)

/**
 * GPS
 */
#ifdef __GPS_SUPPORT__
#define NVRAM_EF_GPS_SETTING_DATA_TOTAL 1
#define NVRAM_EF_GPS_SETTING_DATA_SIZE  (sizeof(nvram_ef_gps_setting_data_struct))
#ifdef __MNL_SUPPORT__
#define NVRAM_EF_MNL_SETTING_DATA_TOTAL 1
#define NVRAM_EF_MNL_SETTING_DATA_SIZE  16
#endif /* __MNL_SUPPORT__ */
#endif /* __GPS_SUPPORT__ */ 

/*
 * __DRM_V02__
 */
#define NVRAM_EF_DRM_SETTING_SIZE 16
#define NVRAM_EF_DRM_SETTING_TOTAL 10

#define NVRAM_EF_DRM_STIME_SIZE  128
#define NVRAM_EF_DRM_STIME_TOTAL 1

#define NVRAM_EF_DRM_CERPATH_SIZE 1024
#define NVRAM_EF_DRM_CERPATH_TOTAL 1

/**
 * BWCS
 */
#if defined (__WIFI_BT_SINGLE_ANTENNA_SUPPORT__)
#define NVRAM_EF_BWCS_SETTING_DATA_SIZE  80
#define NVRAM_EF_BWCS_SETTING_DATA_TOTAL 1
#endif

/**
 * Serial Number
 */
#define NVRAM_EF_BARCODE_NUM_SIZE       64
#define NVRAM_EF_BARCODE_NUM_TOTAL    1

/********************************
 * Factory Process
 ********************************/ 
#define NVRAM_EF_CAL_FLAG_SIZE    sizeof(nvram_cal_flag_struct)
#define NVRAM_EF_CAL_FLAG_TOTAL  1

#define NVRAM_EF_CAL_DATA_CHECK_SIZE   sizeof(nvram_cal_data_check_struct)
#define NVRAM_EF_CAL_DATA_CHECK_TOTAL 1   // don't change the record number!

#if defined (__PS_SERVICE__) && defined (__MOD_TCM__) && defined (__EXT_PDP_CONTEXT_ON__)
/**
 * TCM PDP profile
 */
#define NVRAM_EF_TCM_PDP_PROFILE_SIZE          (sizeof(nvram_ef_tcm_PDP_profile_record_struct)) //erica 20070112
#define NVRAM_EF_TCM_PDP_PROFILE_TOTAL       (MAX_EXT_PDP_CONTEXT) * (NVRAM_DUAL_RECORD) // Carlson 20100125: modify nvram record to reduce ROM (do not use fix value, instead, use compile option to determine the total record)
#endif // ~ #if defined (__PS_SERVICE__) && defined (__MOD_TCM__) && defined (__EXT_PDP_CONTEXT_ON__)






/*----------------------------------------------------------------------------*/
/* L4 Start: Please put L4 NVRAM info here                                    */
/*----------------------------------------------------------------------------*/



/*------------------------------------------------------------*/
/* L4PHB-CallLog Start                                        */
/*------------------------------------------------------------*/

/* Can not wrap compile option as it's used by other L4 modules such as ATcmd */

#if !defined(L4_NOT_PRESENT)
#ifndef __PHB_STORAGE_BY_MMI__
#define NVRAM_EF_PHB_SIZE                  sizeof(nvram_ef_phb_struct)
#define NVRAM_EF_PHB_TOTAL                 MAX_PHB_PHONE_ENTRY
#endif
#endif

/* How many log data in one NVRAM record, never change it */
#define NVRAM_EF_PHB_LN_SIZE                    (10)     

/* call name buffer size */
#if defined(__L4_MAX_NAME_60__)
#define PHB_LN_NAME_SIZE                        (62)
#elif defined(__L4_MAX_NAME_20__)
#define PHB_LN_NAME_SIZE                        (22)
#else /* defined(__L4_MAX_NAME_30__) */
#define PHB_LN_NAME_SIZE                        (32)
#endif /* defined(__L4_MAX_NAME_60__) */

/* Call number buffer size */
#if defined __VOIP__  /* It's ok to do this as VoIP is turned off on naptune */
#define PHB_LN_NUM_SIZE                         ((41 >= (VOIP_URI_LEN)) ? 41 : (VOIP_URI_LEN))
#else
#define PHB_LN_NUM_SIZE                         (41)
#endif

/* Record size */
#define NVRAM_EF_PHB_LN_ENTRY_SIZE              (sizeof(nvram_ef_phb_ln_struct))

/* Record total number */
#if (MAX_PHB_LN_ENTRY > 20)
#define NVRAM_EF_PHB_LN_ENTRY_TOTAL             ((((MAX_PHB_LN_ENTRY + NVRAM_EF_PHB_LN_SIZE - 1) / NVRAM_EF_PHB_LN_SIZE) * 3) * (NVRAM_DUAL_RECORD))
#else /* If define __L4_MAX_NAME_60__, the total LN is fixed to 15 * 3 = 45, please check it in phb_defs.h */
#define NVRAM_EF_PHB_LN_ENTRY_TOTAL             (6 * NVRAM_DUAL_RECORD) 
#endif 

/* Record size and total number */
#define NVRAM_EF_PHB_LN_TYPE_SEQ_SIZE           (NVRAM_EF_PHB_LN_ENTRY_TOTAL * NVRAM_EF_PHB_LN_SIZE / NVRAM_DUAL_RECORD)
#define NVRAM_EF_PHB_LN_TYPE_SEQ_TOTAL          (1 * NVRAM_DUAL_RECORD)


/*------------------------------------------------------------*/
/* L4PHB-CallLog End                                          */
/*------------------------------------------------------------*/

/**
 * PS TestMode Read/Write by L4C 
 */
#define  NVRAM_EF_PS_CONFORMANCE_TESTMODE_SIZE      4
#define  NVRAM_EF_PS_CONFORMANCE_TESTMODE_TOTAL     1

/*
 * __MOBILE_BROADBAND_PROVISION_CONTEXT__: Read/Write by L4C 
 */
#define  NVRAM_EF_MOBILE_BROADBAND_PROVISION_CONTEXT_SIZE      sizeof(nvram_ef_mobile_broadband_provision_context_struct)
#define  NVRAM_EF_MOBILE_BROADBAND_PROVISION_CONTEXT_TOTAL     10

/*----------------------------------------------------------------------------*/
/* L4 End: Please put L4 NVRAM info above                                     */
/*----------------------------------------------------------------------------*/


#define NVRAM_EF_ABM_PS_QOS_PROFILE_TOTAL       2
#define NVRAM_EF_ABM_PS_QOS_PROFILE_SIZE        56


/*----------------------------------------------------------------------------*/
/* Audio NVRAM info above                                                     */
/*----------------------------------------------------------------------------*/


#define NVRAM_EF_NVRAM_UNIT_TEST_SIZE      sizeof(nvram_ef_nvram_unit_test_struct)
#define NVRAM_EF_NVRAM_UNIT_TEST_TOTAL     5



/*----------------------------------------------------------------------------*/
/* camera NVRAM info end                                                      */
/*----------------------------------------------------------------------------*/

/**
 * System Cache OCTET : This is a special NVRAM data item used for storage purpose.
 *                                   Please note that the default value is ALWAYS 0x00
 */
#define NVRAM_EF_SYS_CACHE_OCTET_SIZE        8
#define NVRAM_EF_SYS_CACHE_OCTET_TOTAL     20

typedef enum
{
    NVRAM_SYS_CACHE_BEGIN = 1,
    NVRAM_SYS_FLIGHTMODE_STATE,
    NVRAM_SYS_DSP_PATCH,
    NVRAM_SYS_SIM_PLUS_SETTING,
    NVRAM_SYS_FIXED_GAIN_MECH_FOR_HELIOS2,
    NVRAM_SYS_FACTORY_FLAG,
    NVRAM_SYS_LAST_FAT_STATUS,
    NVRAM_SYS_INFO,
    NVRAM_SYS_PHB_COMPARE_DIGIT,
    NVRAM_SYS_SVN,
    NVRAM_SYS_USB_BOOT_MODE,
    NVRAM_SYS_USB_TETHERING_MODE,    
    NVRAM_SYS_AUTO_TEST,
    NVRAM_SYS_SWLA,
    NVRAM_SYS_MS_CALI_ACC,
    NVRAM_SYS_MOT_DECRYPTION,
    NVRAM_SYS_CACHE_MAX
} nvram_sys_cache_enum;


/**
 * RAC preference
 */
/* support 3G multiband for MT6268 */
#define NVRAM_EF_RAC_PREFERENCE_SIZE         7 /* 4+2 (3g band) +1 (gprs_transfer_preference) */
#define NVRAM_EF_RAC_PREFERENCE_TOTAL        (1 * NVRAM_DUAL_RECORD)

// RF calibration history NVRAM items
#ifdef __TC01__
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
#endif // #ifdef __TC01__

//jiawang move the following stuffy from nvram_editor_data_item.h to nvram_data_item.h for HAL Rule 
#ifdef __GPS_SUPPORT__
typedef struct
{
    kal_uint8 gps_time_valid_flag;
    kal_int32 gps_diff_wn;
    double    gps_diff_tow;
    kal_uint8 gps_clock_drift_valid_flag;
    double    gps_clock_drift;
    kal_int32 gps_clock_drift_age;
    kal_int32 gps_clock_drift_wn;
    double    gps_clock_drift_tow;    
}nvram_ef_gps_setting_data_struct;
#ifdef __MNL_SUPPORT__
typedef struct
{
    kal_uint8 nvram_ef_mnl_setting_data[NVRAM_EF_MNL_SETTING_DATA_SIZE];   
}nvram_ef_mnl_setting_data_struct;
#endif /* __MNL_SUPPORT__ */
#endif /* __GPS_SUPPORT__ */
//jiawang

#define NVRAM_EF_TST_CONFIG_SIZE         sizeof(tst_config_struct_t)
#define NVRAM_EF_TST_CONFIG_TOTAL        1

#ifdef __cplusplus
}
#endif 

#endif /* NVRAM_DATA_ITEMS_H */ /* define NVRAM_DATA_ITEMS_H */